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config.h 4.8 kB

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  1. /**
  2. * Copyright 2020 Huawei Technologies Co., Ltd
  3. * Licensed under the Apache License, Version 2.0 (the "License");
  4. * you may not use this file except in compliance with the License.
  5. * You may obtain a copy of the License at
  6. * http://www.apache.org/licenses/LICENSE-2.0
  7. * Unless required by applicable law or agreed to in writing, software
  8. * distributed under the License is distributed on an "AS IS" BASIS,
  9. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  10. * See the License for the specific language governing permissions and
  11. * limitations under the License.
  12. */
  13. #ifndef __CCE_RUNTIME_CONFIG_H__
  14. #define __CCE_RUNTIME_CONFIG_H__
  15. #include "base.h"
  16. #if defined(__cplusplus) && !defined(COMPILE_OMG_PACKAGE)
  17. extern "C" {
  18. #endif
  19. #define PLAT_COMBINE(arch, chip, ver) ((arch << 16) | (chip << 8) | (ver))
  20. #define PLAT_GET_ARCH(type) ((type >> 16) & 0xffff)
  21. #define PLAT_GET_CHIP(type) ((type >> 8) & 0xff)
  22. #define PLAT_GET_VER(type) (type & 0xff)
  23. typedef enum tagRtArchType {
  24. ARCH_BEGIN = 0,
  25. ARCH_V100 = ARCH_BEGIN,
  26. ARCH_V200,
  27. ARCH_END,
  28. } rtArchType_t;
  29. typedef enum tagRtChipType {
  30. CHIP_BEGIN = 0,
  31. CHIP_MINI = CHIP_BEGIN,
  32. CHIP_CLOUD,
  33. CHIP_MDC,
  34. CHIP_LHISI,
  35. CHIP_DC,
  36. CHIP_CLOUD_V2,
  37. CHIP_END,
  38. } rtChipType_t;
  39. typedef enum tagRtVersion {
  40. VER_BEGIN = 0,
  41. VER_NA = VER_BEGIN,
  42. VER_ES,
  43. VER_CS,
  44. VER_SD3403,
  45. VER_END,
  46. } rtVersion_t;
  47. /* match rtChipType_t */
  48. typedef enum tagRtPlatformType {
  49. PLATFORM_BEGIN = 0,
  50. PLATFORM_MINI_V1 = PLATFORM_BEGIN,
  51. PLATFORM_CLOUD_V1,
  52. PLATFORM_MINI_V2,
  53. PLATFORM_LHISI_ES,
  54. PLATFORM_LHISI_CS,
  55. PLATFORM_DC,
  56. PLATFORM_CLOUD_V2,
  57. PLATFORM_END,
  58. } rtPlatformType_t;
  59. typedef enum tagRtCubeFracMKNFp16 {
  60. RT_CUBE_MKN_FP16_2_16_16 = 0,
  61. RT_CUBE_MKN_FP16_4_16_16,
  62. RT_CUBE_MKN_FP16_16_16_16,
  63. RT_CUBE_MKN_FP16_Default,
  64. } rtCubeFracMKNFp16_t;
  65. typedef enum tagRtCubeFracMKNInt8 {
  66. RT_CUBE_MKN_INT8_2_32_16 = 0,
  67. RT_CUBE_MKN_INT8_4_32_4,
  68. RT_CUBE_MKN_INT8_4_32_16,
  69. RT_CUBE_MKN_INT8_16_32_16,
  70. RT_CUBE_MKN_INT8_Default,
  71. } rtCubeFracMKNInt8_t;
  72. typedef enum tagRtVecFracVmulMKNFp16 {
  73. RT_VEC_VMUL_MKN_FP16_1_16_16 = 0,
  74. RT_VEC_VMUL_MKN_FP16_Default,
  75. } rtVecFracVmulMKNFp16_t;
  76. typedef enum tagRtVecFracVmulMKNInt8 {
  77. RT_VEC_VMUL_MKN_INT8_1_32_16 = 0,
  78. RT_VEC_VMUL_MKN_INT8_Default,
  79. } rtVecFracVmulMKNInt8_t;
  80. typedef struct tagRtAiCoreSpec {
  81. uint32_t cubeFreq;
  82. uint32_t cubeMSize;
  83. uint32_t cubeKSize;
  84. uint32_t cubeNSize;
  85. rtCubeFracMKNFp16_t cubeFracMKNFp16;
  86. rtCubeFracMKNInt8_t cubeFracMKNInt8;
  87. rtVecFracVmulMKNFp16_t vecFracVmulMKNFp16;
  88. rtVecFracVmulMKNInt8_t vecFracVmulMKNInt8;
  89. } rtAiCoreSpec_t;
  90. typedef struct tagRtAiCoreRatesPara {
  91. uint32_t ddrRate;
  92. uint32_t l2Rate;
  93. uint32_t l2ReadRate;
  94. uint32_t l2WriteRate;
  95. uint32_t l1ToL0ARate;
  96. uint32_t l1ToL0BRate;
  97. uint32_t l0CToUBRate;
  98. uint32_t ubToL2;
  99. uint32_t ubToDDR;
  100. uint32_t ubToL1;
  101. } rtAiCoreMemoryRates_t;
  102. typedef struct tagRtMemoryConfig {
  103. uint32_t flowtableSize;
  104. uint32_t compilerSize;
  105. } rtMemoryConfig_t;
  106. typedef struct tagRtPlatformConfig {
  107. uint32_t platformConfig;
  108. } rtPlatformConfig_t;
  109. /**
  110. * @ingroup
  111. * @brief get AI core count
  112. * @param [in] aiCoreCnt
  113. * @return aiCoreCnt
  114. */
  115. RTS_API rtError_t rtGetAiCoreCount(uint32_t *aiCoreCnt);
  116. /**
  117. * @ingroup
  118. * @brief get AI cpu count
  119. * @param [in] aiCpuCnt
  120. * @return aiCpuCnt
  121. */
  122. RTS_API rtError_t rtGetAiCpuCount(uint32_t *aiCpuCnt);
  123. /**
  124. * @ingroup
  125. * @brief get AI core frequency
  126. * @param [in] aiCoreSpec
  127. * @return aiCoreSpec
  128. */
  129. RTS_API rtError_t rtGetAiCoreSpec(rtAiCoreSpec_t *aiCoreSpec);
  130. /**
  131. * @ingroup
  132. * @brief AI get core band Info
  133. * @param [in] aiCoreMemoryRates
  134. * @return aiCoreMemoryRates
  135. */
  136. RTS_API rtError_t rtGetAiCoreMemoryRates(rtAiCoreMemoryRates_t *aiCoreMemoryRates);
  137. /**
  138. * @ingroup
  139. * @brief AI get core buffer Info,FlowTable Size,Compiler Size
  140. * @param [in] memoryConfig
  141. * @return memoryConfig
  142. */
  143. RTS_API rtError_t rtGetMemoryConfig(rtMemoryConfig_t *memoryConfig);
  144. /**
  145. * @ingroup
  146. * @brief get l2 buffer Info,virtual baseaddr,Size
  147. * @param [in] stream
  148. * @return RT_ERROR_NONE for ok, errno for failed
  149. */
  150. RTS_API rtError_t rtMemGetL2Info(rtStream_t stream, void **ptr, uint32_t *size);
  151. /**
  152. * @ingroup
  153. * @brief get runtime version. The version is returned as (1000 major + 10 minor). For example, RUNTIME 9.2 would be
  154. * represented by 9020.
  155. * @param [out] runtimeVersion
  156. * @return RT_ERROR_NONE for ok
  157. * @return RT_ERROR_INVALID_VALUE for error input
  158. */
  159. RTS_API rtError_t rtGetRuntimeVersion(uint32_t *runtimeVersion);
  160. #if defined(__cplusplus) && !defined(COMPILE_OMG_PACKAGE)
  161. }
  162. #endif
  163. #endif // __CCE_RUNTIME_STREAM_H__

图引擎模块(GE)是MindSpore的一个子模块,其代码由C++实现,位于前端模块ME和底层硬件之间,起到承接作用。图引擎模块以ME下发的图作为输入,然后进行一系列的深度图优化操作,最后输出一张可以在底层硬件上高效运行的图。GE针对昇腾AI处理器的硬件结构特点,做了特定的优化工作,以此来充分发挥出昇腾AI处理器的强大算力。在进行模型训练/推理时,GE会被自动调用而用户并不感知。GE主要由GE API和GE Core两部分组成,详细的架构图如下所示