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OpenBLAS/cpuid_x86.c

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  1. /*********************************************************************/

  2. /* Copyright 2009, 2010 The University of Texas at Austin.           */

  3. /* All rights reserved.                                              */

  4. /*                                                                   */

  5. /* Redistribution and use in source and binary forms, with or        */

  6. /* without modification, are permitted provided that the following   */

  7. /* conditions are met:                                               */

  8. /*                                                                   */

  9. /*   1. Redistributions of source code must retain the above         */

  10. /*      copyright notice, this list of conditions and the following  */

  11. /*      disclaimer.                                                  */

  12. /*                                                                   */

  13. /*   2. Redistributions in binary form must reproduce the above      */

  14. /*      copyright notice, this list of conditions and the following  */

  15. /*      disclaimer in the documentation and/or other materials       */

  16. /*      provided with the distribution.                              */

  17. /*                                                                   */

  18. /*    THIS  SOFTWARE IS PROVIDED  BY THE  UNIVERSITY OF  TEXAS AT    */

  19. /*    AUSTIN  ``AS IS''  AND ANY  EXPRESS OR  IMPLIED WARRANTIES,    */

  20. /*    INCLUDING, BUT  NOT LIMITED  TO, THE IMPLIED  WARRANTIES OF    */

  21. /*    MERCHANTABILITY  AND FITNESS FOR  A PARTICULAR  PURPOSE ARE    */

  22. /*    DISCLAIMED.  IN  NO EVENT SHALL THE UNIVERSITY  OF TEXAS AT    */

  23. /*    AUSTIN OR CONTRIBUTORS BE  LIABLE FOR ANY DIRECT, INDIRECT,    */

  24. /*    INCIDENTAL,  SPECIAL, EXEMPLARY,  OR  CONSEQUENTIAL DAMAGES    */

  25. /*    (INCLUDING, BUT  NOT LIMITED TO,  PROCUREMENT OF SUBSTITUTE    */

  26. /*    GOODS  OR  SERVICES; LOSS  OF  USE,  DATA,  OR PROFITS;  OR    */

  27. /*    BUSINESS INTERRUPTION) HOWEVER CAUSED  AND ON ANY THEORY OF    */

  28. /*    LIABILITY, WHETHER  IN CONTRACT, STRICT  LIABILITY, OR TORT    */

  29. /*    (INCLUDING NEGLIGENCE OR OTHERWISE)  ARISING IN ANY WAY OUT    */

  30. /*    OF  THE  USE OF  THIS  SOFTWARE,  EVEN  IF ADVISED  OF  THE    */

  31. /*    POSSIBILITY OF SUCH DAMAGE.                                    */

  32. /*                                                                   */

  33. /* The views and conclusions contained in the software and           */

  34. /* documentation are those of the authors and should not be          */

  35. /* interpreted as representing official policies, either expressed   */

  36. /* or implied, of The University of Texas at Austin.                 */

  37. /*********************************************************************/

  38. 

  39. #include <stdio.h>

  40. #include <string.h>

  41. #include "cpuid.h"

  42. 

  43. #ifndef CPUIDEMU

  44. 

  45. #if defined(__APPLE__) && defined(__i386__)

  46. void cpuid(int op, int *eax, int *ebx, int *ecx, int *edx);

  47. #else

  48. static inline void cpuid(int op, int *eax, int *ebx, int *ecx, int *edx){

  49.   __asm__ __volatile__

  50.     ("cpuid": "=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx) : "a" (op) : "cc");

  51. 

  52. }

  53. #endif

  54. 

  55. #else

  56. 

  57. typedef struct {

  58.   unsigned int id, a, b, c, d;

  59. } idlist_t;

  60. 

  61. typedef struct {

  62.   char *vendor;

  63.   char *name;

  64.   int start, stop;

  65. } vendor_t;

  66. 

  67. extern idlist_t idlist[];

  68. extern vendor_t vendor[];

  69. 

  70. static int cv = VENDOR;

  71. 

  72. void cpuid(unsigned int op, unsigned int *eax, unsigned int *ebx, unsigned int *ecx, unsigned int *edx){

  73. 

  74.   static int current = 0;

  75. 

  76.   int start = vendor[cv].start;

  77.   int stop  = vendor[cv].stop;

  78.   int count = stop - start;

  79. 

  80.   if ((current < start) || (current > stop)) current = start;

  81. 

  82.   while ((count > 0) && (idlist[current].id != op)) {

  83.     

  84.     current ++;

  85.     if (current > stop) current = start;

  86.     count --;

  87. 

  88.   }

  89. 

  90.   *eax = idlist[current].a;

  91.   *ebx = idlist[current].b;

  92.   *ecx = idlist[current].c;

  93.   *edx = idlist[current].d;

  94. }

  95. 

  96. #endif

  97. 

  98. static inline int have_cpuid(void){

  99.   int eax, ebx, ecx, edx;

  100. 

  101.   cpuid(0, &eax, &ebx, &ecx, &edx);

  102.   return eax;

  103. }

  104. 

  105. static inline int have_excpuid(void){

  106.   int eax, ebx, ecx, edx;

  107. 

  108.   cpuid(0x80000000, &eax, &ebx, &ecx, &edx);

  109.   return eax & 0xffff;

  110. }

  111. 

  112. int get_vendor(void){

  113.   int eax, ebx, ecx, edx;

  114.   char vendor[13];

  115. 

  116.   cpuid(0, &eax, &ebx, &ecx, &edx);

  117.   

  118.   *(int *)(&vendor[0]) = ebx;

  119.   *(int *)(&vendor[4]) = edx;

  120.   *(int *)(&vendor[8]) = ecx;

  121.   vendor[12] = (char)0;

  122. 

  123.   if (!strcmp(vendor, "GenuineIntel")) return VENDOR_INTEL;

  124.   if (!strcmp(vendor, " UMC UMC UMC")) return VENDOR_UMC;

  125.   if (!strcmp(vendor, "AuthenticAMD")) return VENDOR_AMD;

  126.   if (!strcmp(vendor, "CyrixInstead")) return VENDOR_CYRIX;

  127.   if (!strcmp(vendor, "NexGenDriven")) return VENDOR_NEXGEN;

  128.   if (!strcmp(vendor, "CentaurHauls")) return VENDOR_CENTAUR;

  129.   if (!strcmp(vendor, "RiseRiseRise")) return VENDOR_RISE;

  130.   if (!strcmp(vendor, " SiS SiS SiS")) return VENDOR_SIS;

  131.   if (!strcmp(vendor, "GenuineTMx86")) return VENDOR_TRANSMETA;

  132.   if (!strcmp(vendor, "Geode by NSC")) return VENDOR_NSC;

  133. 

  134.   if ((eax == 0) || ((eax & 0x500) != 0)) return VENDOR_INTEL;

  135. 

  136.   return VENDOR_UNKNOWN;

  137. }

  138.   

  139. int get_cputype(int gettype){

  140.   int eax, ebx, ecx, edx;

  141.   int extend_family, family;

  142.   int extend_model, model;

  143.   int type, stepping;

  144.   int feature = 0;

  145. 

  146.   cpuid(1, &eax, &ebx, &ecx, &edx);

  147.   

  148.   switch (gettype) {

  149.   case GET_EXFAMILY :

  150.     return BITMASK(eax, 20, 0xff);

  151.   case GET_EXMODEL :

  152.     return BITMASK(eax, 16, 0x0f);

  153.   case GET_TYPE :

  154.     return BITMASK(eax, 12, 0x03);

  155.   case GET_FAMILY :

  156.     return BITMASK(eax,  8, 0x0f);

  157.   case GET_MODEL :

  158.     return BITMASK(eax,  4, 0x0f);

  159.   case GET_APICID :

  160.     return BITMASK(ebx, 24, 0x0f);

  161.   case GET_LCOUNT :

  162.     return BITMASK(ebx, 16, 0x0f);

  163.   case GET_CHUNKS :

  164.     return BITMASK(ebx,  8, 0x0f);

  165.   case GET_STEPPING :

  166.     return BITMASK(eax,  0, 0x0f);

  167.   case GET_BLANDID :

  168.     return BITMASK(ebx,  0, 0xff);

  169.   case GET_NUMSHARE :

  170.     if (have_cpuid() < 4) return 0;

  171.     cpuid(4, &eax, &ebx, &ecx, &edx);

  172.     return BITMASK(eax, 14, 0xfff);

  173.   case GET_NUMCORES :

  174.     if (have_cpuid() < 4) return 0;

  175.     cpuid(4, &eax, &ebx, &ecx, &edx);

  176.     return BITMASK(eax, 26, 0x3f);

  177. 

  178.   case GET_FEATURE :

  179.     if ((edx & (1 <<  3)) != 0) feature |= HAVE_PSE;

  180.     if ((edx & (1 << 15)) != 0) feature |= HAVE_CMOV;

  181.     if ((edx & (1 << 19)) != 0) feature |= HAVE_CFLUSH;

  182.     if ((edx & (1 << 23)) != 0) feature |= HAVE_MMX;

  183.     if ((edx & (1 << 25)) != 0) feature |= HAVE_SSE;

  184.     if ((edx & (1 << 26)) != 0) feature |= HAVE_SSE2;

  185.     if ((edx & (1 << 27)) != 0) {

  186.       if (BITMASK(ebx, 16, 0x0f) > 0) feature |= HAVE_HIT;

  187.     }

  188.     if ((ecx & (1 <<  0)) != 0) feature |= HAVE_SSE3;

  189.     if ((ecx & (1 <<  9)) != 0) feature |= HAVE_SSSE3;

  190.     if ((ecx & (1 << 19)) != 0) feature |= HAVE_SSE4_1;

  191.     if ((ecx & (1 << 20)) != 0) feature |= HAVE_SSE4_2;

  192.     if ((ecx & (1 << 28)) != 0) feature |= HAVE_AVX;

  193. 

  194.     if (have_excpuid() >= 0x01) {

  195.       cpuid(0x80000001, &eax, &ebx, &ecx, &edx);

  196.       if ((ecx & (1 <<  6)) != 0) feature |= HAVE_SSE4A;

  197.       if ((ecx & (1 <<  7)) != 0) feature |= HAVE_MISALIGNSSE;

  198.       if ((edx & (1 << 30)) != 0) feature |= HAVE_3DNOWEX;

  199.       if ((edx & (1 << 31)) != 0) feature |= HAVE_3DNOW;

  200.     }

  201. 

  202.     if (have_excpuid() >= 0x1a) {

  203.       cpuid(0x8000001a, &eax, &ebx, &ecx, &edx);

  204.       if ((eax & (1 <<  0)) != 0) feature |= HAVE_128BITFPU;

  205.       if ((eax & (1 <<  1)) != 0) feature |= HAVE_FASTMOVU;

  206.     }

  207. 

  208.   }

  209.   return feature;

  210. }

  211.   

  212. int get_cacheinfo(int type, cache_info_t *cacheinfo){

  213.   int eax, ebx, ecx, edx, cpuid_level;

  214.   int info[15];

  215.   int i;

  216.   cache_info_t LC1, LD1, L2, L3, 

  217.     ITB, DTB, LITB, LDTB,

  218.     L2ITB, L2DTB, L2LITB, L2LDTB;

  219. 

  220.   LC1.size    = 0; LC1.associative = 0; LC1.linesize = 0; LC1.shared = 0;

  221.   LD1.size    = 0; LD1.associative    = 0; LD1.linesize    = 0; LD1.shared    = 0;

  222.   L2.size     = 0; L2.associative     = 0; L2.linesize     = 0; L2.shared     = 0;

  223.   L3.size     = 0; L3.associative     = 0; L3.linesize     = 0; L3.shared     = 0;

  224.   ITB.size    = 0; ITB.associative    = 0; ITB.linesize    = 0; ITB.shared    = 0;

  225.   DTB.size    = 0; DTB.associative    = 0; DTB.linesize    = 0; DTB.shared    = 0;

  226.   LITB.size   = 0; LITB.associative   = 0; LITB.linesize   = 0; LITB.shared   = 0;

  227.   LDTB.size   = 0; LDTB.associative   = 0; LDTB.linesize   = 0; LDTB.shared   = 0;

  228.   L2ITB.size  = 0; L2ITB.associative  = 0; L2ITB.linesize  = 0; L2ITB.shared  = 0;

  229.   L2DTB.size  = 0; L2DTB.associative  = 0; L2DTB.linesize  = 0; L2DTB.shared  = 0;

  230.   L2LITB.size = 0; L2LITB.associative = 0; L2LITB.linesize = 0; L2LITB.shared = 0;

  231.   L2LDTB.size = 0; L2LDTB.associative = 0; L2LDTB.linesize = 0; L2LDTB.shared = 0;

  232. 

  233.   cpuid(0, &cpuid_level, &ebx, &ecx, &edx);

  234. 

  235.   if (cpuid_level > 1) {

  236. 

  237.     cpuid(2, &eax, &ebx, &ecx, &edx);

  238. 

  239.     info[ 0] = BITMASK(eax,  8, 0xff);

  240.     info[ 1] = BITMASK(eax, 16, 0xff);

  241.     info[ 2] = BITMASK(eax, 24, 0xff);

  242.     

  243.     info[ 3] = BITMASK(ebx,  0, 0xff);

  244.     info[ 4] = BITMASK(ebx,  8, 0xff);

  245.     info[ 5] = BITMASK(ebx, 16, 0xff);

  246.     info[ 6] = BITMASK(ebx, 24, 0xff);

  247.     

  248.     info[ 7] = BITMASK(ecx,  0, 0xff);

  249.     info[ 8] = BITMASK(ecx,  8, 0xff);

  250.     info[ 9] = BITMASK(ecx, 16, 0xff);

  251.     info[10] = BITMASK(ecx, 24, 0xff);

  252.     

  253.     info[11] = BITMASK(edx,  0, 0xff);

  254.     info[12] = BITMASK(edx,  8, 0xff);

  255.     info[13] = BITMASK(edx, 16, 0xff);

  256.     info[14] = BITMASK(edx, 24, 0xff);

  257.     

  258.     for (i = 0; i < 15; i++){

  259. 

  260.       switch (info[i]){

  261. 

  262. 	/* This table is from http://www.sandpile.org/ia32/cpuid.htm */

  263. 

  264.       case 0x01 :

  265. 	ITB.size        =     4;

  266. 	ITB.associative =     4;

  267. 	ITB.linesize     =   32;

  268. 	break;

  269.       case 0x02 :

  270. 	LITB.size        = 4096;

  271. 	LITB.associative =    0;

  272. 	LITB.linesize    =    2;

  273. 	break;

  274.       case 0x03 :

  275. 	DTB.size        =     4;

  276. 	DTB.associative =     4;

  277. 	DTB.linesize     =   64;

  278. 	break;

  279.       case 0x04 :

  280. 	LDTB.size        = 4096;

  281. 	LDTB.associative =    4;

  282. 	LDTB.linesize    =    8;

  283. 	break;

  284.       case 0x05 :

  285. 	LDTB.size        = 4096;

  286. 	LDTB.associative =    4;

  287. 	LDTB.linesize    =   32;

  288. 	break;

  289.       case 0x06 :

  290. 	LC1.size        = 8;

  291. 	LC1.associative = 4;

  292. 	LC1.linesize    = 32;

  293. 	break;

  294.       case 0x08 :

  295. 	LC1.size        = 16;

  296. 	LC1.associative = 4;

  297. 	LC1.linesize    = 32;

  298. 	break;

  299.       case 0x09 :

  300. 	LC1.size        = 32;

  301. 	LC1.associative = 4;

  302. 	LC1.linesize    = 64;

  303. 	break;

  304.       case 0x0a :

  305. 	LD1.size        = 8;

  306. 	LD1.associative = 2;

  307. 	LD1.linesize    = 32;

  308. 	break;

  309.       case 0x0c :

  310. 	LD1.size        = 16;

  311. 	LD1.associative = 4;

  312. 	LD1.linesize    = 32;

  313. 	break;

  314.       case 0x0d :

  315. 	LD1.size        = 16;

  316. 	LD1.associative = 4;

  317. 	LD1.linesize    = 64;

  318. 	break;

  319.       case 0x0e :

  320. 	LD1.size        = 24;

  321. 	LD1.associative = 6;

  322. 	LD1.linesize    = 64;

  323. 	break;

  324.       case 0x10 :

  325. 	LD1.size        = 16;

  326. 	LD1.associative = 4;

  327. 	LD1.linesize    = 32;

  328. 	break;

  329.       case 0x15 :

  330. 	LC1.size        = 16;

  331. 	LC1.associative = 4;

  332. 	LC1.linesize    = 32;

  333. 	break;

  334.       case 0x1a :

  335. 	L2.size         = 96;

  336. 	L2.associative  = 6;

  337. 	L2.linesize     = 64;

  338. 	break;

  339.       case 0x21 :

  340. 	L2.size         = 256;

  341. 	L2.associative  = 8;

  342. 	L2.linesize     = 64;

  343. 	break;

  344.       case 0x22 :

  345. 	L3.size         = 512;

  346. 	L3.associative  = 4;

  347. 	L3.linesize     = 64;

  348. 	break;

  349.       case 0x23 :

  350. 	L3.size         = 1024;

  351. 	L3.associative  = 8;

  352. 	L3.linesize     = 64;

  353. 	break;

  354.       case 0x25 :

  355. 	L3.size         = 2048;

  356. 	L3.associative  = 8;

  357. 	L3.linesize     = 64;

  358. 	break;

  359.       case 0x29 :

  360. 	L3.size         = 4096;

  361. 	L3.associative  = 8;

  362. 	L3.linesize     = 64;

  363. 	break;

  364.       case 0x2c :

  365. 	LD1.size        = 32;

  366. 	LD1.associative = 8;

  367. 	LD1.linesize    = 64;

  368. 	break;

  369.       case 0x30 :

  370. 	LC1.size        = 32;

  371. 	LC1.associative = 8;

  372. 	LC1.linesize    = 64;

  373. 	break;

  374.       case 0x39 :

  375. 	L2.size         = 128;

  376. 	L2.associative  = 4;

  377. 	L2.linesize     = 64;

  378. 	break;

  379.       case 0x3a :

  380. 	L2.size         = 192;

  381. 	L2.associative  = 6;

  382. 	L2.linesize     = 64;

  383. 	break;

  384.       case 0x3b :

  385. 	L2.size         = 128;

  386. 	L2.associative  = 2;

  387. 	L2.linesize     = 64;

  388. 	break;

  389.       case 0x3c :

  390. 	L2.size         = 256;

  391. 	L2.associative  = 4;

  392. 	L2.linesize     = 64;

  393. 	break;

  394.       case 0x3d :

  395. 	L2.size         = 384;

  396. 	L2.associative  = 6;

  397. 	L2.linesize     = 64;

  398. 	break;

  399.       case 0x3e :

  400. 	L2.size         = 512;

  401. 	L2.associative  = 4;

  402. 	L2.linesize     = 64;

  403. 	break;

  404.       case 0x41 :

  405. 	L2.size         = 128;

  406. 	L2.associative  = 4;

  407. 	L2.linesize     = 32;

  408. 	break;

  409.       case 0x42 :

  410. 	L2.size         = 256;

  411. 	L2.associative  = 4;

  412. 	L2.linesize     = 32;

  413. 	break;

  414.       case 0x43 :

  415. 	L2.size         = 512;

  416. 	L2.associative  = 4;

  417. 	L2.linesize     = 32;

  418. 	break;

  419.       case 0x44 :

  420. 	L2.size         = 1024;

  421. 	L2.associative  = 4;

  422. 	L2.linesize     = 32;

  423. 	break;

  424.       case 0x45 :

  425. 	L2.size         = 2048;

  426. 	L2.associative  = 4;

  427. 	L2.linesize     = 32;

  428. 	break;

  429.       case 0x46 :

  430. 	L3.size         = 4096;

  431. 	L3.associative  = 4;

  432. 	L3.linesize     = 64;

  433. 	break;

  434.       case 0x47 :

  435. 	L3.size         = 8192;

  436. 	L3.associative  = 8;

  437. 	L3.linesize     = 64;

  438. 	break;

  439.       case 0x48 :

  440. 	L2.size         = 3184;

  441. 	L2.associative  = 12;

  442. 	L2.linesize     = 64;

  443. 	break;

  444.       case 0x49 :

  445. 	if ((get_cputype(GET_FAMILY) == 0x0f) && (get_cputype(GET_MODEL) == 0x06)) {

  446. 	  L3.size         = 4096;

  447. 	  L3.associative  = 16;

  448. 	  L3.linesize     = 64;

  449. 	} else {

  450. 	  L2.size         = 4096;

  451. 	  L2.associative  = 16;

  452. 	  L2.linesize     = 64;

  453. 	}

  454. 	break;

  455.       case 0x4a :

  456. 	L3.size         = 6144;

  457. 	L3.associative  = 12;

  458. 	L3.linesize     = 64;

  459. 	break;

  460.       case 0x4b :

  461. 	L3.size         = 8192;

  462. 	L3.associative  = 16;

  463. 	L3.linesize     = 64;

  464. 	break;

  465.       case 0x4c :

  466. 	L3.size         = 12280;

  467. 	L3.associative  = 12;

  468. 	L3.linesize     = 64;

  469. 	break;

  470.       case 0x4d :

  471. 	L3.size         = 16384;

  472. 	L3.associative  = 16;

  473. 	L3.linesize     = 64;

  474. 	break;

  475.       case 0x4e :

  476. 	L2.size         = 6144;

  477. 	L2.associative  = 24;

  478. 	L2.linesize     = 64;

  479. 	break;

  480.       case 0x4f :

  481. 	ITB.size         = 4;

  482. 	ITB.associative  = 0;

  483. 	ITB.linesize     = 32;

  484. 	break;

  485.       case 0x50 :

  486. 	ITB.size         = 4;

  487. 	ITB.associative  = 0;

  488. 	ITB.linesize     = 64;

  489. 	LITB.size        = 4096;

  490. 	LITB.associative = 0;

  491. 	LITB.linesize    = 64;

  492. 	LITB.shared      = 1;

  493. 	break;

  494.       case 0x51 :

  495. 	ITB.size        = 4;

  496. 	ITB.associative = 0;

  497. 	ITB.linesize     = 128;

  498. 	LITB.size        = 4096;

  499. 	LITB.associative = 0;

  500. 	LITB.linesize    = 128;

  501. 	LITB.shared      = 1;

  502. 	break;

  503.       case 0x52 :

  504. 	ITB.size         = 4;

  505. 	ITB.associative  = 0;

  506. 	ITB.linesize     = 256;

  507. 	LITB.size        = 4096;

  508. 	LITB.associative = 0;

  509. 	LITB.linesize    = 256;

  510. 	LITB.shared      = 1;

  511. 	break;

  512.       case 0x55 :

  513. 	LITB.size        = 4096;

  514. 	LITB.associative = 0;

  515. 	LITB.linesize    = 7;

  516. 	LITB.shared      = 1;

  517. 	break;

  518.       case 0x56 :

  519. 	LDTB.size        = 4096;

  520. 	LDTB.associative = 4;

  521. 	LDTB.linesize    = 16;

  522. 	break;

  523.       case 0x57 :

  524. 	LDTB.size        = 4096;

  525. 	LDTB.associative = 4;

  526. 	LDTB.linesize    = 16;

  527. 	break;

  528.       case 0x5b :

  529. 	DTB.size         = 4;

  530. 	DTB.associative  = 0;

  531. 	DTB.linesize     = 64;

  532. 	LDTB.size        = 4096;

  533. 	LDTB.associative = 0;

  534. 	LDTB.linesize    = 64;

  535. 	LDTB.shared      = 1;

  536. 	break;

  537.       case 0x5c :

  538. 	DTB.size         = 4;

  539. 	DTB.associative  = 0;

  540. 	DTB.linesize     = 128;

  541. 	LDTB.size        = 4096;

  542. 	LDTB.associative = 0;

  543. 	LDTB.linesize    = 128;

  544. 	LDTB.shared      = 1;

  545. 	break;

  546.       case 0x5d :

  547. 	DTB.size         = 4;

  548. 	DTB.associative  = 0;

  549. 	DTB.linesize     = 256;

  550. 	LDTB.size        = 4096;

  551. 	LDTB.associative = 0;

  552. 	LDTB.linesize    = 256;

  553. 	LDTB.shared      = 1;

  554. 	break;

  555.       case 0x60 :

  556. 	LD1.size        = 16;

  557. 	LD1.associative = 8;

  558. 	LD1.linesize    = 64;

  559. 	break;

  560.       case 0x66 :

  561. 	LD1.size        = 8;

  562. 	LD1.associative = 4;

  563. 	LD1.linesize    = 64;

  564. 	break;

  565.       case 0x67 :

  566. 	LD1.size        = 16;

  567. 	LD1.associative = 4;

  568. 	LD1.linesize    = 64;

  569. 	break;

  570.       case 0x68 :

  571. 	LD1.size        = 32;

  572. 	LD1.associative = 4;

  573. 	LD1.linesize    = 64;

  574. 	break;

  575.       case 0x70 :

  576. 	LC1.size        = 12;

  577. 	LC1.associative = 8;

  578. 	break;

  579.       case 0x71 :

  580. 	LC1.size        = 16;

  581. 	LC1.associative = 8;

  582. 	break;

  583.       case 0x72 :

  584. 	LC1.size        = 32;

  585. 	LC1.associative = 8;

  586. 	break;

  587.       case 0x73 :

  588. 	LC1.size        = 64;

  589. 	LC1.associative = 8;

  590. 	break;

  591.       case 0x77 :

  592. 	LC1.size        = 16;

  593. 	LC1.associative = 4;

  594. 	LC1.linesize    = 64;

  595. 	break;

  596.       case 0x78 :

  597. 	L2.size        = 1024;

  598. 	L2.associative = 4;

  599. 	L2.linesize    = 64;

  600. 	break;

  601.       case 0x79 :

  602. 	L2.size         = 128;

  603. 	L2.associative  = 8;

  604. 	L2.linesize     = 64;

  605. 	break;

  606.       case 0x7a :

  607. 	L2.size         = 256;

  608. 	L2.associative  = 8;

  609. 	L2.linesize     = 64;

  610. 	break;

  611.       case 0x7b :

  612. 	L2.size         = 512;

  613. 	L2.associative  = 8;

  614. 	L2.linesize     = 64;

  615. 	break;

  616.       case 0x7c :

  617. 	L2.size         = 1024;

  618. 	L2.associative  = 8;

  619. 	L2.linesize     = 64;

  620. 	break;

  621.       case 0x7d :

  622. 	L2.size         = 2048;

  623. 	L2.associative  = 8;

  624. 	L2.linesize     = 64;

  625. 	break;

  626.       case 0x7e :

  627. 	L2.size         = 256;

  628. 	L2.associative  = 8;

  629. 	L2.linesize     = 128;

  630. 	break;

  631.       case 0x7f :

  632. 	L2.size         = 512;

  633. 	L2.associative  = 2;

  634. 	L2.linesize     = 64;

  635. 	break;

  636.       case 0x81 :

  637. 	L2.size         = 128;

  638. 	L2.associative  = 8;

  639. 	L2.linesize     = 32;

  640. 	break;

  641.       case 0x82 :

  642. 	L2.size         = 256;

  643. 	L2.associative  = 8;

  644. 	L2.linesize     = 32;

  645. 	break;

  646.       case 0x83 :

  647. 	L2.size         = 512;

  648. 	L2.associative  = 8;

  649. 	L2.linesize     = 32;

  650. 	break;

  651.       case 0x84 :

  652. 	L2.size         = 1024;

  653. 	L2.associative  = 8;

  654. 	L2.linesize     = 32;

  655. 	break;

  656.       case 0x85 :

  657. 	L2.size         = 2048;

  658. 	L2.associative  = 8;

  659. 	L2.linesize     = 32;

  660. 	break;

  661.       case 0x86 :

  662. 	L2.size         = 512;

  663. 	L2.associative  = 4;

  664. 	L2.linesize     = 64;

  665. 	break;

  666.       case 0x87 :

  667. 	L2.size         = 1024;

  668. 	L2.associative  = 8;

  669. 	L2.linesize     = 64;

  670. 	break;

  671.       case 0x88 :

  672. 	L3.size         = 2048;

  673. 	L3.associative  = 4;

  674. 	L3.linesize     = 64;

  675. 	break;

  676.       case 0x89 :

  677. 	L3.size         = 4096;

  678. 	L3.associative  = 4;

  679. 	L3.linesize     = 64;

  680. 	break;

  681.       case 0x8a :

  682. 	L3.size         = 8192;

  683. 	L3.associative  = 4;

  684. 	L3.linesize     = 64;

  685. 	break;

  686.       case 0x8d :

  687. 	L3.size         = 3096;

  688. 	L3.associative  = 12;

  689. 	L3.linesize     = 128;

  690. 	break;

  691.       case 0x90 :

  692. 	ITB.size        = 4;

  693. 	ITB.associative = 0;

  694. 	ITB.linesize    = 64;

  695. 	break;

  696.       case 0x96 :

  697. 	DTB.size        = 4;

  698. 	DTB.associative = 0;

  699. 	DTB.linesize    = 32;

  700. 	break;

  701.       case 0x9b :

  702. 	L2DTB.size        = 4;

  703. 	L2DTB.associative = 0;

  704. 	L2DTB.linesize    = 96;

  705. 	break;

  706.       case 0xb0 :

  707. 	ITB.size        = 4;

  708. 	ITB.associative = 4;

  709. 	ITB.linesize    = 128;

  710. 	break;

  711.       case 0xb1 :

  712. 	LITB.size        = 4096;

  713. 	LITB.associative = 4;

  714. 	LITB.linesize    = 4;

  715. 	break;

  716.       case 0xb2 :

  717. 	ITB.size        = 4;

  718. 	ITB.associative = 4;

  719. 	ITB.linesize    = 64;

  720. 	break;

  721.       case 0xb3 :

  722. 	DTB.size        = 4;

  723. 	DTB.associative = 4;

  724. 	DTB.linesize    = 128;

  725. 	break;

  726.       case 0xb4 :

  727. 	DTB.size        = 4;

  728. 	DTB.associative = 4;

  729. 	DTB.linesize    = 256;

  730. 	break;

  731.       case 0xba :

  732. 	DTB.size        = 4;

  733. 	DTB.associative = 4;

  734. 	DTB.linesize    = 64;

  735. 	break;

  736.       case 0xd0 :

  737. 	L3.size         = 512;

  738. 	L3.associative  = 4;

  739. 	L3.linesize     = 64;

  740. 	break;

  741.       case 0xd1 :

  742. 	L3.size         = 1024;

  743. 	L3.associative  = 4;

  744. 	L3.linesize     = 64;

  745. 	break;

  746.       case 0xd2 :

  747. 	L3.size         = 2048;

  748. 	L3.associative  = 4;

  749. 	L3.linesize     = 64;

  750. 	break;

  751.       case 0xd6 :

  752. 	L3.size         = 1024;

  753. 	L3.associative  = 8;

  754. 	L3.linesize     = 64;

  755. 	break;

  756.       case 0xd7 :

  757. 	L3.size         = 2048;

  758. 	L3.associative  = 8;

  759. 	L3.linesize     = 64;

  760. 	break;

  761.       case 0xd8 :

  762. 	L3.size         = 4096;

  763. 	L3.associative  = 8;

  764. 	L3.linesize     = 64;

  765. 	break;

  766.       case 0xdc :

  767. 	L3.size         = 2048;

  768. 	L3.associative  = 12;

  769. 	L3.linesize     = 64;

  770. 	break;

  771.       case 0xdd :

  772. 	L3.size         = 4096;

  773. 	L3.associative  = 12;

  774. 	L3.linesize     = 64;

  775. 	break;

  776.       case 0xde :

  777. 	L3.size         = 8192;

  778. 	L3.associative  = 12;

  779. 	L3.linesize     = 64;

  780. 	break;

  781.       case 0xe2 :

  782. 	L3.size         = 2048;

  783. 	L3.associative  = 16;

  784. 	L3.linesize     = 64;

  785. 	break;

  786.       case 0xe3 :

  787. 	L3.size         = 4096;

  788. 	L3.associative  = 16;

  789. 	L3.linesize     = 64;

  790. 	break;

  791.       case 0xe4 :

  792. 	L3.size         = 8192;

  793. 	L3.associative  = 16;

  794. 	L3.linesize     = 64;

  795. 	break;

  796.       }

  797.     }

  798.   }

  799. 

  800.   if (get_vendor() == VENDOR_INTEL) {

  801.     cpuid(0x80000000, &cpuid_level, &ebx, &ecx, &edx);

  802.     if (cpuid_level >= 0x80000006) {

  803.       cpuid(0x80000006, &eax, &ebx, &ecx, &edx);

  804. 

  805.       L2.size         = BITMASK(ecx, 16, 0xffff);

  806.       L2.associative  = BITMASK(ecx, 12, 0x0f);

  807.       L2.linesize     = BITMASK(ecx,  0, 0xff);

  808.     }

  809.   }

  810. 

  811.   if ((get_vendor() == VENDOR_AMD) || (get_vendor() == VENDOR_CENTAUR)) {

  812.     cpuid(0x80000005, &eax, &ebx, &ecx, &edx);

  813. 

  814.     LDTB.size        = 4096;

  815.     LDTB.associative = BITMASK(eax, 24, 0xff);

  816.     if (LDTB.associative == 0xff) LDTB.associative = 0;

  817.     LDTB.linesize    = BITMASK(eax, 16, 0xff);

  818. 

  819.     LITB.size        = 4096;

  820.     LITB.associative = BITMASK(eax,  8, 0xff);

  821.     if (LITB.associative == 0xff) LITB.associative = 0;

  822.     LITB.linesize    = BITMASK(eax,  0, 0xff);

  823.     

  824.     DTB.size        = 4;

  825.     DTB.associative = BITMASK(ebx, 24, 0xff);

  826.     if (DTB.associative == 0xff) DTB.associative = 0;

  827.     DTB.linesize    = BITMASK(ebx, 16, 0xff);

  828. 

  829.     ITB.size        = 4;

  830.     ITB.associative = BITMASK(ebx,  8, 0xff);

  831.     if (ITB.associative == 0xff) ITB.associative = 0;

  832.     ITB.linesize    = BITMASK(ebx,  0, 0xff);

  833. 

  834.     LD1.size        = BITMASK(ecx, 24, 0xff);

  835.     LD1.associative = BITMASK(ecx, 16, 0xff);

  836.     if (LD1.associative == 0xff) LD1.associative = 0;

  837.     LD1.linesize    = BITMASK(ecx,  0, 0xff);

  838. 

  839.     LC1.size        = BITMASK(ecx, 24, 0xff);

  840.     LC1.associative = BITMASK(ecx, 16, 0xff);

  841.     if (LC1.associative == 0xff) LC1.associative = 0;

  842.     LC1.linesize    = BITMASK(ecx,  0, 0xff);

  843. 

  844.     cpuid(0x80000006, &eax, &ebx, &ecx, &edx);

  845. 

  846.     L2LDTB.size        = 4096;

  847.     L2LDTB.associative = BITMASK(eax, 24, 0xff);

  848.     if (L2LDTB.associative == 0xff) L2LDTB.associative = 0;

  849.     L2LDTB.linesize    = BITMASK(eax, 16, 0xff);

  850. 

  851.     L2LITB.size        = 4096;

  852.     L2LITB.associative = BITMASK(eax,  8, 0xff);

  853.     if (L2LITB.associative == 0xff) L2LITB.associative = 0;

  854.     L2LITB.linesize    = BITMASK(eax,  0, 0xff);

  855.     

  856.     L2DTB.size        = 4;

  857.     L2DTB.associative = BITMASK(ebx, 24, 0xff);

  858.     if (L2DTB.associative == 0xff) L2DTB.associative = 0;

  859.     L2DTB.linesize    = BITMASK(ebx, 16, 0xff);

  860. 

  861.     L2ITB.size        = 4;

  862.     L2ITB.associative = BITMASK(ebx,  8, 0xff);

  863.     if (L2ITB.associative == 0xff) L2ITB.associative = 0;

  864.     L2ITB.linesize    = BITMASK(ebx,  0, 0xff);

  865. 

  866.     L2.size        = BITMASK(ecx, 16, 0xffff);

  867.     L2.associative = BITMASK(ecx, 12, 0xf);

  868.     if (L2.associative == 0xff) L2.associative = 0;

  869.     L2.linesize    = BITMASK(ecx,  0, 0xff);

  870. 

  871.     L3.size        = BITMASK(edx, 18, 0x3fff) * 512;

  872.     L3.associative = BITMASK(edx, 12, 0xf);

  873.     if (L3.associative == 0xff) L2.associative = 0;

  874.     L3.linesize    = BITMASK(edx,  0, 0xff);

  875. 

  876.   }

  877. 

  878.     switch (type) {

  879.       

  880.     case CACHE_INFO_L1_I :

  881.       *cacheinfo = LC1;

  882.       break;

  883.     case CACHE_INFO_L1_D :

  884.       *cacheinfo = LD1;

  885.       break;

  886.     case CACHE_INFO_L2 :

  887.       *cacheinfo = L2;

  888.       break;

  889.     case CACHE_INFO_L3 :

  890.       *cacheinfo = L3;

  891.       break;

  892.     case CACHE_INFO_L1_DTB :

  893.       *cacheinfo = DTB;

  894.       break;

  895.     case CACHE_INFO_L1_ITB :

  896.       *cacheinfo = ITB;

  897.       break;

  898.     case CACHE_INFO_L1_LDTB :

  899.       *cacheinfo = LDTB;

  900.       break;

  901.     case CACHE_INFO_L1_LITB :

  902.       *cacheinfo = LITB;

  903.       break;

  904.     case CACHE_INFO_L2_DTB :

  905.       *cacheinfo = L2DTB;

  906.       break;

  907.     case CACHE_INFO_L2_ITB :

  908.       *cacheinfo = L2ITB;

  909.       break;

  910.     case CACHE_INFO_L2_LDTB :

  911.       *cacheinfo = L2LDTB;

  912.       break;

  913.     case CACHE_INFO_L2_LITB :

  914.       *cacheinfo = L2LITB;

  915.       break;

  916.     }

  917.   return 0;

  918. }

  919. 

  920. int get_cpuname(void){

  921. 

  922.   int family, exfamily, model, vendor, exmodel;

  923. 

  924.   if (!have_cpuid()) return CPUTYPE_80386;

  925. 

  926.   family   = get_cputype(GET_FAMILY);

  927.   exfamily = get_cputype(GET_EXFAMILY);

  928.   model    = get_cputype(GET_MODEL);

  929.   exmodel  = get_cputype(GET_EXMODEL);

  930. 

  931.   vendor = get_vendor();

  932. 

  933.   if (vendor == VENDOR_INTEL){

  934.     switch (family) {

  935.     case 0x4:

  936.       return CPUTYPE_80486;

  937.     case 0x5:

  938.       return CPUTYPE_PENTIUM;

  939.     case 0x6:

  940.       switch (exmodel) {

  941.       case 0: 

  942. 	switch (model) {

  943. 	case  1:

  944. 	case  3:

  945. 	case  5:

  946. 	case  6:

  947. 	  return CPUTYPE_PENTIUM2;

  948. 	case  7:

  949. 	case  8:

  950. 	case 10:

  951. 	case 11:

  952. 	  return CPUTYPE_PENTIUM3;

  953. 	case  9:

  954. 	case 13:

  955. 	case 14:

  956. 	  return CPUTYPE_PENTIUMM;

  957. 	case 15:

  958. 	  return CPUTYPE_CORE2;

  959. 	}

  960. 	break;

  961.       case 1:

  962. 	switch (model) {

  963. 	case  6:

  964. 	  return CPUTYPE_CORE2;

  965. 	case  7:

  966. 	  return CPUTYPE_PENRYN;

  967. 	case 10:

  968. 	case 11:

  969. 	case 14:

  970. 	case 15:

  971. 	  return CPUTYPE_NEHALEM;

  972. 	case 12:

  973. 	  return CPUTYPE_ATOM;

  974. 	case 13:

  975. 	  return CPUTYPE_DUNNINGTON;

  976. 	}

  977. 	break;

  978. 	  case  2:

  979. 		  switch (model) {

  980. 		  case 5:

  981. 			  //Intel Core (Clarkdale) / Core (Arrandale) 

  982. 			  // Pentium (Clarkdale) / Pentium Mobile (Arrandale) 

  983. 			  // Xeon (Clarkdale), 32nm

  984. 			  return CPUTYPE_NEHALEM;

  985. 		  case 10:

  986.                           //Intel Core i5-2000 /i7-2000 (Sandy Bridge)

  987.                           return CPUTYPE_SANDYBRIDGE;

  988. 		  case 12:

  989. 			  //Xeon Processor 5600 (Westmere-EP)

  990. 			  return CPUTYPE_NEHALEM;

  991. 		  case 13:

  992.                           //Intel Core i7-3000 / Xeon E5 (Sandy Bridge)

  993.                           return CPUTYPE_SANDYBRIDGE;

  994. 		  case 15:

  995. 			  //Xeon Processor E7 (Westmere-EX)

  996. 			  return CPUTYPE_NEHALEM;

  997. 		  }

  998. 		  break;

  999.       }

  1000.       break;

  1001.     case 0x7:

  1002.       return CPUTYPE_ITANIUM;

  1003.     case 0xf:

  1004.       switch (exfamily) {

  1005.       case 0 :

  1006. 	return CPUTYPE_PENTIUM4;

  1007.       case 1 :

  1008. 	return CPUTYPE_ITANIUM;

  1009.       }

  1010.       break;

  1011.     }

  1012.     return CPUTYPE_INTEL_UNKNOWN;

  1013.   }

  1014. 

  1015.   if (vendor == VENDOR_AMD){

  1016.     switch (family) {

  1017.     case 0x4:

  1018.       return CPUTYPE_AMD5X86;

  1019.     case 0x5:

  1020.       return CPUTYPE_AMDK6;

  1021.     case 0x6:

  1022.       return CPUTYPE_ATHLON;

  1023.     case 0xf:

  1024.       switch (exfamily) {

  1025.       case  0:

  1026.       case  2:

  1027. 	return CPUTYPE_OPTERON;

  1028.       case  1:

  1029.       case 10:

  1030. 	return CPUTYPE_BARCELONA;

  1031.       case  5:

  1032. 	return CPUTYPE_BOBCATE;

  1033.       }

  1034.       break;

  1035.     }

  1036.     return CPUTYPE_AMD_UNKNOWN;

  1037.   }

  1038. 

  1039.   if (vendor == VENDOR_CYRIX){

  1040.     switch (family) {

  1041.     case 0x4:

  1042.       return CPUTYPE_CYRIX5X86;

  1043.     case 0x5:

  1044.       return CPUTYPE_CYRIXM1;

  1045.     case 0x6:

  1046.       return CPUTYPE_CYRIXM2;

  1047.     }

  1048.     return CPUTYPE_CYRIX_UNKNOWN;

  1049.   }

  1050. 

  1051.   if (vendor == VENDOR_NEXGEN){

  1052.     switch (family) {

  1053.     case 0x5:

  1054.       return CPUTYPE_NEXGENNX586;

  1055.     }

  1056.     return CPUTYPE_NEXGEN_UNKNOWN;

  1057.   }

  1058. 

  1059.   if (vendor == VENDOR_CENTAUR){

  1060.     switch (family) {

  1061.     case 0x5:

  1062.       return CPUTYPE_CENTAURC6;

  1063.       break;

  1064.     case 0x6:

  1065.       return CPUTYPE_NANO;

  1066.       break;

  1067. 

  1068.     }

  1069.     return CPUTYPE_VIAC3;

  1070.   }

  1071. 

  1072.   if (vendor == VENDOR_RISE){

  1073.     switch (family) {

  1074.     case 0x5:

  1075.       return CPUTYPE_RISEMP6;

  1076.     }

  1077.     return CPUTYPE_RISE_UNKNOWN;

  1078.   }

  1079. 

  1080.   if (vendor == VENDOR_SIS){

  1081.     switch (family) {

  1082.     case 0x5:

  1083.       return CPUTYPE_SYS55X;

  1084.     }

  1085.     return CPUTYPE_SIS_UNKNOWN;

  1086.   }

  1087. 

  1088.   if (vendor == VENDOR_TRANSMETA){

  1089.     switch (family) {

  1090.     case 0x5:

  1091.       return CPUTYPE_CRUSOETM3X;

  1092.     }

  1093.     return CPUTYPE_TRANSMETA_UNKNOWN;

  1094.   }

  1095. 

  1096.   if (vendor == VENDOR_NSC){

  1097.     switch (family) {

  1098.     case 0x5:

  1099.       return CPUTYPE_NSGEODE;

  1100.     }

  1101.     return CPUTYPE_NSC_UNKNOWN;

  1102.   }

  1103. 

  1104.   return CPUTYPE_UNKNOWN;

  1105. }

  1106. 

  1107. static char *cpuname[] = {

  1108.   "UNKNOWN",

  1109.   "INTEL_UNKNOWN",

  1110.   "UMC_UNKNOWN",

  1111.   "AMD_UNKNOWN",

  1112.   "CYRIX_UNKNOWN",

  1113.   "NEXGEN_UNKNOWN",

  1114.   "CENTAUR_UNKNOWN",

  1115.   "RISE_UNKNOWN",

  1116.   "SIS_UNKNOWN",

  1117.   "TRANSMETA_UNKNOWN",

  1118.   "NSC_UNKNOWN",

  1119.   "80386",

  1120.   "80486",

  1121.   "PENTIUM",

  1122.   "PENTIUM2",

  1123.   "PENTIUM3",

  1124.   "PENTIUMM",

  1125.   "PENTIUM4",

  1126.   "CORE2",

  1127.   "PENRYN",

  1128.   "DUNNINGTON",

  1129.   "NEHALEM",

  1130.   "ATOM",

  1131.   "ITANIUM",

  1132.   "ITANIUM2",

  1133.   "5X86",

  1134.   "K6",

  1135.   "ATHLON",

  1136.   "DURON",

  1137.   "OPTERON",

  1138.   "BARCELONA",

  1139.   "SHANGHAI",

  1140.   "ISTANBUL",

  1141.   "CYRIX5X86",

  1142.   "CYRIXM1",

  1143.   "CYRIXM2",

  1144.   "NEXGENNX586",

  1145.   "CENTAURC6",

  1146.   "RISEMP6",

  1147.   "SYS55X",

  1148.   "TM3X00",

  1149.   "NSGEODE",

  1150.   "VIAC3",

  1151.   "NANO",

  1152.   "SANDYBRIDGE",

  1153.   "BOBCATE",

  1154. };

  1155. 

  1156. static char *lowercpuname[] = {

  1157.   "unknown",

  1158.   "intel_unknown",

  1159.   "umc_unknown",

  1160.   "amd_unknown",

  1161.   "cyrix_unknown",

  1162.   "nexgen_unknown",

  1163.   "centaur_unknown",

  1164.   "rise_unknown",

  1165.   "sis_unknown",

  1166.   "transmeta_unknown",

  1167.   "nsc_unknown",

  1168.   "80386",

  1169.   "80486",

  1170.   "pentium",

  1171.   "pentium2",

  1172.   "pentium3",

  1173.   "pentiumm",

  1174.   "pentium4",

  1175.   "core2",

  1176.   "penryn",

  1177.   "dunnington",

  1178.   "nehalem",

  1179.   "atom",

  1180.   "itanium",

  1181.   "itanium2",

  1182.   "5x86",

  1183.   "k6",

  1184.   "athlon",

  1185.   "duron",

  1186.   "opteron",

  1187.   "barcelona",

  1188.   "shanghai",

  1189.   "istanbul",

  1190.   "cyrix5x86",

  1191.   "cyrixm1",

  1192.   "cyrixm2",

  1193.   "nexgennx586",

  1194.   "centaurc6",

  1195.   "risemp6",

  1196.   "sys55x",

  1197.   "tms3x00",

  1198.   "nsgeode",

  1199.   "nano",

  1200.   "sandybridge",

  1201.   "bobcate",

  1202. };

  1203. 

  1204. static char *corename[] = {

  1205.   "UNKOWN",

  1206.   "80486", 

  1207.   "P5",

  1208.   "P6",

  1209.   "KATMAI",

  1210.   "COPPERMINE",

  1211.   "NORTHWOOD",

  1212.   "PRESCOTT",

  1213.   "BANIAS",

  1214.   "ATHLON",

  1215.   "OPTERON",

  1216.   "BARCELONA",

  1217.   "VIAC3",

  1218.   "YONAH",

  1219.   "CORE2",

  1220.   "PENRYN",

  1221.   "DUNNINGTON",

  1222.   "NEHALEM",

  1223.   "ATOM",

  1224.   "NANO",

  1225.   "SANDYBRIDGE",

  1226.   "BOBCATE",

  1227. };

  1228. 

  1229. static char *corename_lower[] = {

  1230.   "unknown",

  1231.   "80486", 

  1232.   "p5",

  1233.   "p6",

  1234.   "katmai",

  1235.   "coppermine",

  1236.   "northwood",

  1237.   "prescott",

  1238.   "banias",

  1239.   "athlon",

  1240.   "opteron",

  1241.   "barcelona",

  1242.   "viac3",

  1243.   "yonah",

  1244.   "core2",

  1245.   "penryn",

  1246.   "dunnington",

  1247.   "nehalem",

  1248.   "atom",

  1249.   "nano",

  1250.   "sandybridge",

  1251.   "bobcate",

  1252. };

  1253. 

  1254. 

  1255. char *get_cpunamechar(void){

  1256.   return cpuname[get_cpuname()];

  1257. }

  1258. 

  1259. char *get_lower_cpunamechar(void){

  1260.   return lowercpuname[get_cpuname()];

  1261. }

  1262. 

  1263. 

  1264. int get_coretype(void){

  1265. 

  1266.   int family, exfamily, model, exmodel, vendor;

  1267. 

  1268.   if (!have_cpuid()) return CORE_80486;

  1269. 

  1270.   family   = get_cputype(GET_FAMILY);

  1271.   exfamily = get_cputype(GET_EXFAMILY);

  1272.   model    = get_cputype(GET_MODEL);

  1273.   exmodel  = get_cputype(GET_EXMODEL);

  1274. 

  1275.   vendor = get_vendor();

  1276. 

  1277.   if (vendor == VENDOR_INTEL){

  1278.     switch (family) {

  1279.     case  4:

  1280.       return CORE_80486;

  1281.     case  5:

  1282.       return CORE_P5;

  1283.     case  6:

  1284.       switch (exmodel) {

  1285.       case  0:

  1286. 	switch (model) {

  1287. 	case  0:

  1288. 	case  1:

  1289. 	case  2:

  1290. 	case  3:

  1291. 	case  4:

  1292. 	case  5:

  1293. 	case  6:

  1294. 	  return CORE_P6;

  1295. 	case  7:

  1296. 	  return CORE_KATMAI;

  1297. 	case  8:

  1298. 	case 10:

  1299. 	case 11:

  1300. 	  return CORE_COPPERMINE;

  1301. 	case  9:

  1302. 	case 13:

  1303. 	case 14:

  1304. 	  return CORE_BANIAS;

  1305. 	case 15:

  1306. 	  return CORE_CORE2;

  1307. 	}

  1308. 	break;

  1309.       case  1:

  1310. 	switch (model) {

  1311. 	case  6:

  1312. 	  return CORE_CORE2;

  1313. 	case  7:

  1314. 	  return CORE_PENRYN;

  1315. 	case 10:

  1316. 	case 11:

  1317. 	case 14:

  1318. 	case 15:

  1319. 	  return CORE_NEHALEM;

  1320. 	case 12:

  1321. 	  return CORE_ATOM;

  1322. 	case 13:

  1323. 	  return CORE_DUNNINGTON;

  1324. 	}

  1325. 	break;

  1326.       case  2:

  1327. 	switch (model) {

  1328. 	case 5:

  1329. 	  //Intel Core (Clarkdale) / Core (Arrandale) 

  1330. 	  // Pentium (Clarkdale) / Pentium Mobile (Arrandale) 

  1331. 	  // Xeon (Clarkdale), 32nm

  1332. 	  return CORE_NEHALEM;

  1333. 	case 10:

  1334.           //Intel Core i5-2000 /i7-2000 (Sandy Bridge)

  1335.           return CORE_SANDYBRIDGE;

  1336. 	case 12:

  1337. 	  //Xeon Processor 5600 (Westmere-EP)

  1338. 	  return CORE_NEHALEM;

  1339. 	case 13:

  1340.           //Intel Core i7-3000 / Xeon E5 (Sandy Bridge)

  1341.           return CORE_SANDYBRIDGE;

  1342. 	case 15:

  1343. 	  //Xeon Processor E7 (Westmere-EX)

  1344. 	  return CORE_NEHALEM;

  1345. 	}

  1346. 	break;

  1347.       }

  1348.       break;

  1349. 

  1350.       case 15:

  1351. 	if (model <= 0x2) return CORE_NORTHWOOD;

  1352. 	else return CORE_PRESCOTT;

  1353.     }

  1354.   }

  1355. 

  1356.   if (vendor == VENDOR_AMD){

  1357.     if (family <= 0x5) return CORE_80486;

  1358.     if (family <= 0xe) return CORE_ATHLON;

  1359.     if (family == 0xf){

  1360.       if ((exfamily == 0) || (exfamily == 2)) return CORE_OPTERON; 

  1361.       else if (exfamily == 5) return CORE_BOBCATE; 

  1362.       else return CORE_BARCELONA;

  1363.     }

  1364.   }

  1365. 

  1366.   if (vendor == VENDOR_CENTAUR) {

  1367.     switch (family) {

  1368.     case 0x6:

  1369.       return CORE_NANO;

  1370.       break;

  1371.     }

  1372.     return CORE_VIAC3;

  1373.   }

  1374. 

  1375.   return CORE_UNKNOWN;

  1376. }

  1377. 

  1378. void get_cpuconfig(void){

  1379. 

  1380.   cache_info_t info;

  1381.   int features;

  1382. 

  1383.   printf("#define %s\n", cpuname[get_cpuname()]);

  1384. 

  1385. 

  1386.   if (get_coretype() != CORE_P5) {

  1387. 

  1388.     get_cacheinfo(CACHE_INFO_L1_I, &info);

  1389.     if (info.size > 0) {

  1390.       printf("#define L1_CODE_SIZE %d\n", info.size * 1024);

  1391.       printf("#define L1_CODE_ASSOCIATIVE %d\n", info.associative);

  1392.       printf("#define L1_CODE_LINESIZE %d\n", info.linesize);

  1393.     }

  1394.     

  1395.     get_cacheinfo(CACHE_INFO_L1_D, &info);

  1396.     if (info.size > 0) {

  1397.       printf("#define L1_DATA_SIZE %d\n", info.size * 1024);

  1398.       printf("#define L1_DATA_ASSOCIATIVE %d\n", info.associative);

  1399.       printf("#define L1_DATA_LINESIZE %d\n", info.linesize);

  1400.     }

  1401.     

  1402.     get_cacheinfo(CACHE_INFO_L2, &info);

  1403.     if (info.size > 0) {

  1404.       printf("#define L2_SIZE %d\n", info.size * 1024);

  1405.       printf("#define L2_ASSOCIATIVE %d\n", info.associative);

  1406.       printf("#define L2_LINESIZE %d\n", info.linesize);

  1407.     }

  1408.     

  1409.     get_cacheinfo(CACHE_INFO_L3, &info);

  1410.     if (info.size > 0) {

  1411.       printf("#define L3_SIZE %d\n", info.size * 1024);

  1412.       printf("#define L3_ASSOCIATIVE %d\n", info.associative);

  1413.       printf("#define L3_LINESIZE %d\n", info.linesize);

  1414.     }

  1415.     

  1416.     get_cacheinfo(CACHE_INFO_L1_ITB, &info);

  1417.     if (info.size > 0) {

  1418.       printf("#define ITB_SIZE %d\n", info.size * 1024);

  1419.       printf("#define ITB_ASSOCIATIVE %d\n", info.associative);

  1420.       printf("#define ITB_ENTRIES %d\n", info.linesize);

  1421.     }

  1422.     

  1423.     get_cacheinfo(CACHE_INFO_L1_DTB, &info);

  1424.     if (info.size > 0) {

  1425.       printf("#define DTB_SIZE %d\n", info.size * 1024);

  1426.       printf("#define DTB_ASSOCIATIVE %d\n", info.associative);

  1427.       printf("#define DTB_DEFAULT_ENTRIES %d\n", info.linesize);

  1428.     }

  1429.     

  1430.     features = get_cputype(GET_FEATURE);

  1431. 

  1432.     if (features & HAVE_CMOV )   printf("#define HAVE_CMOV\n");

  1433.     if (features & HAVE_MMX  )   printf("#define HAVE_MMX\n");

  1434.     if (features & HAVE_SSE  )   printf("#define HAVE_SSE\n");

  1435.     if (features & HAVE_SSE2 )   printf("#define HAVE_SSE2\n");

  1436.     if (features & HAVE_SSE3 )   printf("#define HAVE_SSE3\n");

  1437.     if (features & HAVE_SSSE3)   printf("#define HAVE_SSSE3\n");

  1438.     if (features & HAVE_SSE4_1)   printf("#define HAVE_SSE4_1\n");

  1439.     if (features & HAVE_SSE4_2)   printf("#define HAVE_SSE4_2\n");

  1440.     if (features & HAVE_SSE4A)   printf("#define HAVE_SSE4A\n");

  1441.     if (features & HAVE_SSE5 )   printf("#define HAVE_SSSE5\n");

  1442.     if (features & HAVE_AVX )    printf("#define HAVE_AVX\n");

  1443.     if (features & HAVE_3DNOWEX) printf("#define HAVE_3DNOWEX\n");

  1444.     if (features & HAVE_3DNOW)   printf("#define HAVE_3DNOW\n");

  1445.     if (features & HAVE_CFLUSH)  printf("#define HAVE_CFLUSH\n");

  1446.     if (features & HAVE_HIT)     printf("#define HAVE_HIT 1\n");

  1447.     if (features & HAVE_MISALIGNSSE) printf("#define HAVE_MISALIGNSSE\n");

  1448.     if (features & HAVE_128BITFPU)   printf("#define HAVE_128BITFPU\n");

  1449.     if (features & HAVE_FASTMOVU)    printf("#define HAVE_FASTMOVU\n");

  1450.     

  1451.     printf("#define NUM_SHAREDCACHE %d\n", get_cputype(GET_NUMSHARE) + 1);

  1452.     printf("#define NUM_CORES %d\n", get_cputype(GET_NUMCORES) + 1);

  1453. 

  1454.     features = get_coretype();

  1455.     if (features > 0) printf("#define CORE_%s\n", corename[features]);

  1456.   } else {

  1457.     printf("#define DTB_DEFAULT_ENTRIES 16\n");

  1458.     printf("#define L1_CODE_SIZE 8192\n");

  1459.     printf("#define L1_DATA_SIZE 8192\n");

  1460.     printf("#define L2_SIZE 0\n");

  1461.   }

  1462. }

  1463. 

  1464. void get_architecture(void){

  1465. #ifndef __64BIT__

  1466.     printf("X86");

  1467. #else

  1468.     printf("X86_64");

  1469. #endif

  1470. }

  1471. 

  1472. void get_subarchitecture(void){

  1473.     printf("%s", get_cpunamechar());

  1474. }

  1475. 

  1476. void get_subdirname(void){

  1477. #ifndef __64BIT__

  1478.     printf("x86");

  1479. #else

  1480.     printf("x86_64");

  1481. #endif

  1482. }

  1483. 

  1484. char *get_corename(void){

  1485.   return corename[get_coretype()];

  1486. }

  1487. 

  1488. void get_libname(void){

  1489.   printf("%s",   corename_lower[get_coretype()]);

  1490. }

  1491. 

  1492. /* This if for Makefile */

  1493. void get_sse(void){

  1494. 

  1495.   int features;

  1496. 

  1497.   features = get_cputype(GET_FEATURE);

  1498. 

  1499.   if (features & HAVE_MMX  )   printf("HAVE_MMX=1\n");

  1500.   if (features & HAVE_SSE  )   printf("HAVE_SSE=1\n");

  1501.   if (features & HAVE_SSE2 )   printf("HAVE_SSE2=1\n");

  1502.   if (features & HAVE_SSE3 )   printf("HAVE_SSE3=1\n");

  1503.   if (features & HAVE_SSSE3)   printf("HAVE_SSSE3=1\n");

  1504.   if (features & HAVE_SSE4_1)   printf("HAVE_SSE4_1=1\n");

  1505.   if (features & HAVE_SSE4_2)   printf("HAVE_SSE4_2=1\n");

  1506.   if (features & HAVE_SSE4A)   printf("HAVE_SSE4A=1\n");

  1507.   if (features & HAVE_SSE5 )   printf("HAVE_SSSE5=1\n");

  1508.   if (features & HAVE_AVX )    printf("HAVE_AVX=1\n");

  1509.   if (features & HAVE_3DNOWEX) printf("HAVE_3DNOWEX=1\n");

  1510.   if (features & HAVE_3DNOW)   printf("HAVE_3DNOW=1\n");

  1511. 

  1512. }