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OpenBLAS/kernel/x86_64/bf16_common_macros.h

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  1. /***************************************************************************

  2. Copyright (c) 2014, The OpenBLAS Project

  3. All rights reserved.

  4. Redistribution and use in source and binary forms, with or without

  5. modification, are permitted provided that the following conditions are

  6. met:

  7. 1. Redistributions of source code must retain the above copyright

  8. notice, this list of conditions and the following disclaimer.

  9. 2. Redistributions in binary form must reproduce the above copyright

  10. notice, this list of conditions and the following disclaimer in

  11. the documentation and/or other materials provided with the

  12. distribution.

  13. 3. Neither the name of the OpenBLAS project nor the names of

  14. its contributors may be used to endorse or promote products

  15. derived from this software without specific prior written permission.

  16. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"

  17. AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE

  18. IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE

  19. ARE DISCLAIMED. IN NO EVENT SHALL THE OPENBLAS PROJECT OR CONTRIBUTORS BE

  20. LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL

  21. DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR

  22. SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER

  23. CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,

  24. OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE

  25. USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

  26. *****************************************************************************/

  27. #ifndef __BF16_COMMON_MACROS

  28. #define __BF16_COMMON_MACROS

  29. 

  30. #include <immintrin.h>

  31. 

  32. #define _MM512_BROADCASTD_EPI32(addr, zmm)             \

  33.                     __asm__ ("vpbroadcastd (%1), %0;"  \

  34.                             : "=v" (zmm)               \

  35.                             : "r"  (addr) )

  36. 

  37. #define PREFETCH_T0(addr)             \

  38.                     __asm__ ("prefetcht0 (%0);"  \

  39.                             :                    \

  40.                             : "r"  (addr) )

  41. 

  42. #define EXTRACT_LOW_256_FROM_512_2X(reg256, reg512)   \

  43.     reg256##_0 = _mm512_castps512_ps256(reg512##_0);  \

  44.     reg256##_1 = _mm512_castps512_ps256(reg512##_1);

  45. 

  46. 

  47. #define BF16_MATRIX_LOAD_8x32(regArray, a, lda, idx_m, idx_n)      \

  48.     regArray##_0 = _mm512_loadu_si512(&a[(idx_m+0)*lda + idx_n]);  \

  49.     regArray##_1 = _mm512_loadu_si512(&a[(idx_m+1)*lda + idx_n]);  \

  50.     regArray##_2 = _mm512_loadu_si512(&a[(idx_m+2)*lda + idx_n]);  \

  51.     regArray##_3 = _mm512_loadu_si512(&a[(idx_m+3)*lda + idx_n]);  \

  52.     regArray##_4 = _mm512_loadu_si512(&a[(idx_m+4)*lda + idx_n]);  \

  53.     regArray##_5 = _mm512_loadu_si512(&a[(idx_m+5)*lda + idx_n]);  \

  54.     regArray##_6 = _mm512_loadu_si512(&a[(idx_m+6)*lda + idx_n]);  \

  55.     regArray##_7 = _mm512_loadu_si512(&a[(idx_m+7)*lda + idx_n]);

  56. 

  57. 

  58. #define BF16_MATRIX_LOAD_8x16(regArray, a, lda, idx_m, idx_n)      \

  59.     regArray##_0 = _mm256_loadu_si256((__m256i *)(&a[(idx_m+0)*lda + idx_n]));  \

  60.     regArray##_1 = _mm256_loadu_si256((__m256i *)(&a[(idx_m+1)*lda + idx_n]));  \

  61.     regArray##_2 = _mm256_loadu_si256((__m256i *)(&a[(idx_m+2)*lda + idx_n]));  \

  62.     regArray##_3 = _mm256_loadu_si256((__m256i *)(&a[(idx_m+3)*lda + idx_n]));  \

  63.     regArray##_4 = _mm256_loadu_si256((__m256i *)(&a[(idx_m+4)*lda + idx_n]));  \

  64.     regArray##_5 = _mm256_loadu_si256((__m256i *)(&a[(idx_m+5)*lda + idx_n]));  \

  65.     regArray##_6 = _mm256_loadu_si256((__m256i *)(&a[(idx_m+6)*lda + idx_n]));  \

  66.     regArray##_7 = _mm256_loadu_si256((__m256i *)(&a[(idx_m+7)*lda + idx_n]));

  67. 

  68. 

  69. #define BF16_MATRIX_LOAD_8x8(regArray, a, lda, idx_m, idx_n)    \

  70.     regArray##_0 = _mm_loadu_si128((__m128i *)(&a[(idx_m+0)*lda + idx_n]));  \

  71.     regArray##_1 = _mm_loadu_si128((__m128i *)(&a[(idx_m+1)*lda + idx_n]));  \

  72.     regArray##_2 = _mm_loadu_si128((__m128i *)(&a[(idx_m+2)*lda + idx_n]));  \

  73.     regArray##_3 = _mm_loadu_si128((__m128i *)(&a[(idx_m+3)*lda + idx_n]));  \

  74.     regArray##_4 = _mm_loadu_si128((__m128i *)(&a[(idx_m+4)*lda + idx_n]));  \

  75.     regArray##_5 = _mm_loadu_si128((__m128i *)(&a[(idx_m+5)*lda + idx_n]));  \

  76.     regArray##_6 = _mm_loadu_si128((__m128i *)(&a[(idx_m+6)*lda + idx_n]));  \

  77.     regArray##_7 = _mm_loadu_si128((__m128i *)(&a[(idx_m+7)*lda + idx_n]));

  78. 

  79. 

  80. #define BF16_MATRIX_LOAD_1x32(regArray, a, lda, idx_m, idx_n)       \

  81.     regArray = _mm512_loadu_si512(&a[idx_m*lda + idx_n]);

  82. 

  83. 

  84. #define BF16_MATRIX_MASKZ_LOAD_8x32(regArray, a, lda, idx_m, idx_n, mask)      \

  85.     regArray##_0 = _mm512_maskz_loadu_epi16(mask, &a[(idx_m+0)*lda + idx_n]);  \

  86.     regArray##_1 = _mm512_maskz_loadu_epi16(mask, &a[(idx_m+1)*lda + idx_n]);  \

  87.     regArray##_2 = _mm512_maskz_loadu_epi16(mask, &a[(idx_m+2)*lda + idx_n]);  \

  88.     regArray##_3 = _mm512_maskz_loadu_epi16(mask, &a[(idx_m+3)*lda + idx_n]);  \

  89.     regArray##_4 = _mm512_maskz_loadu_epi16(mask, &a[(idx_m+4)*lda + idx_n]);  \

  90.     regArray##_5 = _mm512_maskz_loadu_epi16(mask, &a[(idx_m+5)*lda + idx_n]);  \

  91.     regArray##_6 = _mm512_maskz_loadu_epi16(mask, &a[(idx_m+6)*lda + idx_n]);  \

  92.     regArray##_7 = _mm512_maskz_loadu_epi16(mask, &a[(idx_m+7)*lda + idx_n]);

  93. 

  94. 

  95. #define BF16_MATRIX_MASKZ_LOAD_8x16(regArray, a, lda, idx_m, idx_n, mask)      \

  96.     regArray##_0 = _mm256_maskz_loadu_epi16(mask, &a[(idx_m+0)*lda + idx_n]);  \

  97.     regArray##_1 = _mm256_maskz_loadu_epi16(mask, &a[(idx_m+1)*lda + idx_n]);  \

  98.     regArray##_2 = _mm256_maskz_loadu_epi16(mask, &a[(idx_m+2)*lda + idx_n]);  \

  99.     regArray##_3 = _mm256_maskz_loadu_epi16(mask, &a[(idx_m+3)*lda + idx_n]);  \

  100.     regArray##_4 = _mm256_maskz_loadu_epi16(mask, &a[(idx_m+4)*lda + idx_n]);  \

  101.     regArray##_5 = _mm256_maskz_loadu_epi16(mask, &a[(idx_m+5)*lda + idx_n]);  \

  102.     regArray##_6 = _mm256_maskz_loadu_epi16(mask, &a[(idx_m+6)*lda + idx_n]);  \

  103.     regArray##_7 = _mm256_maskz_loadu_epi16(mask, &a[(idx_m+7)*lda + idx_n]);

  104. 

  105. 

  106. #define BF16_MATRIX_MASKZ_LOAD_8x8(regArray, a, lda, idx_m, idx_n, mask)    \

  107.     regArray##_0 = _mm_maskz_loadu_epi16(mask, &a[(idx_m+0)*lda + idx_n]);  \

  108.     regArray##_1 = _mm_maskz_loadu_epi16(mask, &a[(idx_m+1)*lda + idx_n]);  \

  109.     regArray##_2 = _mm_maskz_loadu_epi16(mask, &a[(idx_m+2)*lda + idx_n]);  \

  110.     regArray##_3 = _mm_maskz_loadu_epi16(mask, &a[(idx_m+3)*lda + idx_n]);  \

  111.     regArray##_4 = _mm_maskz_loadu_epi16(mask, &a[(idx_m+4)*lda + idx_n]);  \

  112.     regArray##_5 = _mm_maskz_loadu_epi16(mask, &a[(idx_m+5)*lda + idx_n]);  \

  113.     regArray##_6 = _mm_maskz_loadu_epi16(mask, &a[(idx_m+6)*lda + idx_n]);  \

  114.     regArray##_7 = _mm_maskz_loadu_epi16(mask, &a[(idx_m+7)*lda + idx_n]);

  115. 

  116. 

  117. #define BF16_MATRIX_MASKZ_LOAD_4x32(regArray, a, lda, idx_m, idx_n, mask)      \

  118.     regArray##_0 = _mm512_maskz_loadu_epi16(mask, &a[(idx_m+0)*lda + idx_n]);  \

  119.     regArray##_1 = _mm512_maskz_loadu_epi16(mask, &a[(idx_m+1)*lda + idx_n]);  \

  120.     regArray##_2 = _mm512_maskz_loadu_epi16(mask, &a[(idx_m+2)*lda + idx_n]);  \

  121.     regArray##_3 = _mm512_maskz_loadu_epi16(mask, &a[(idx_m+3)*lda + idx_n]);

  122. 

  123. 

  124. #define BF16_MATRIX_MASKZ_LOAD_4x16(regArray, a, lda, idx_m, idx_n, mask)      \

  125.     regArray##_0 = _mm256_maskz_loadu_epi16(mask, &a[(idx_m+0)*lda + idx_n]);  \

  126.     regArray##_1 = _mm256_maskz_loadu_epi16(mask, &a[(idx_m+1)*lda + idx_n]);  \

  127.     regArray##_2 = _mm256_maskz_loadu_epi16(mask, &a[(idx_m+2)*lda + idx_n]);  \

  128.     regArray##_3 = _mm256_maskz_loadu_epi16(mask, &a[(idx_m+3)*lda + idx_n]);

  129. 

  130. 

  131. #define BF16_MATRIX_MASKZ_LOAD_8x32_2(regArray, a, lda, idx_m, idx_n, mask)    \

  132.     regArray##_0 = _mm512_maskz_loadu_epi16(mask, &a[(idx_m+0)*lda + idx_n]);  \

  133.     regArray##_1 = _mm512_maskz_loadu_epi16(mask, &a[(idx_m+2)*lda + idx_n]);  \

  134.     regArray##_2 = _mm512_maskz_loadu_epi16(mask, &a[(idx_m+4)*lda + idx_n]);  \

  135.     regArray##_3 = _mm512_maskz_loadu_epi16(mask, &a[(idx_m+6)*lda + idx_n]);  \

  136.     regArray##_4 = _mm512_maskz_loadu_epi16(mask, &a[(idx_m+8)*lda + idx_n]);  \

  137.     regArray##_5 = _mm512_maskz_loadu_epi16(mask, &a[(idx_m+10)*lda + idx_n]);  \

  138.     regArray##_6 = _mm512_maskz_loadu_epi16(mask, &a[(idx_m+12)*lda + idx_n]);  \

  139.     regArray##_7 = _mm512_maskz_loadu_epi16(mask, &a[(idx_m+14)*lda + idx_n]);

  140. 

  141. 

  142. #define BF16_MATRIX_MASKZ_LOAD_4x32_2(regArray, a, lda, idx_m, idx_n, mask)    \

  143.     regArray##_0 = _mm512_maskz_loadu_epi16(mask, &a[(idx_m+0)*lda + idx_n]);  \

  144.     regArray##_1 = _mm512_maskz_loadu_epi16(mask, &a[(idx_m+2)*lda + idx_n]);  \

  145.     regArray##_2 = _mm512_maskz_loadu_epi16(mask, &a[(idx_m+4)*lda + idx_n]);  \

  146.     regArray##_3 = _mm512_maskz_loadu_epi16(mask, &a[(idx_m+6)*lda + idx_n]);

  147. 

  148. #define BF16_MATRIX_MASKZ_LOAD_1x32(regArray, a, lda, idx_m, idx_n, mask)      \

  149.     regArray = _mm512_maskz_loadu_epi16(mask, &a[idx_m*lda + idx_n]);

  150. 

  151. #define BF16_VECTOR_LOAD_1x32(reg, x, idx_n)     \

  152.     reg = _mm512_loadu_si512(x + idx_n);

  153. 

  154. 

  155. #define BF16_VECTOR_LOAD_1x16(reg, x, idx_n)     \

  156.     reg = _mm256_loadu_si256((__m256i *)(x + idx_n));

  157. 

  158. 

  159. #define BF16_VECTOR_LOAD_1x8(reg, x, idx_n)      \

  160.     reg = _mm_loadu_si128((__m128i *)(x + idx_n));

  161. 

  162. 

  163. #define BF16_VECTOR_MASKZ_LOAD_1x32(reg, x, idx_n, mask)     \

  164.     reg = _mm512_maskz_loadu_epi16(mask, x + idx_n);

  165. 

  166. 

  167. #define BF16_VECTOR_MASKZ_LOAD_1x16(reg, x, idx_n, mask)     \

  168.     reg = _mm256_maskz_loadu_epi16(mask, x + idx_n);

  169. 

  170. 

  171. #define BF16_VECTOR_MASKZ_LOAD_1x8(reg, x, idx_n, mask)      \

  172.     reg = _mm_maskz_loadu_epi16(mask, x + idx_n);

  173. 

  174. 

  175. /* 2-step interleave for matrix against 8 rows with 32 BF16 elements per row

  176.     Input  - register array of 8 rows of raw-major matrix

  177.     Output - the output of Step 2

  178. 

  179.     Step 1: 2-element interleave for matrix

  180.     |a0|a1|b0|b1|a2|a3|b2|b3|a8 |a9 |b8 |b9 |a10|a11|b10|b11|a16|a17|b16|b17|a18|a19|b18|b19|a24|a25|b24|b25|a26|a27|b26|b27

  181.     |c0|c1|d0|d1|c2|c3|d2|d3|c8 |c9 |d8 |d9 |c10|c11|d10|d11|c16|c17|d16|d17|c18|c19|d18|d19|c24|c25|d24|d25|c26|c27|d26|d27

  182.     |e0|e1|f0|f1|e2|e3|f2|f3|e8 |e9 |f8 |f9 |e10|e11|f10|f11|e16|e17|f16|f17|e18|e19|f18|f19|e24|e25|f24|f25|e26|e27|f26|f27

  183.     |g0|g1|h0|h1|g2|g3|h2|h3|g8 |g9 |h8 |h9 |g10|g11|h10|h11|g16|g17|h16|h17|g18|g19|h18|h19|g24|g25|h24|h25|g26|g27|h26|h27

  184.     |a4|a5|b4|b5|a6|a7|b6|b7|a12|a13|b12|b13|a14|a15|b14|b15|a20|a21|b20|b21|a22|a23|b22|b23|a28|a29|b28|b29|a30|a31|b30|b31

  185.     |c4|c5|d4|d5|c6|c7|d6|d7|c12|c13|d12|d13|c14|c15|d14|d15|c20|c21|d20|d21|c22|c23|d22|d23|c28|c29|d28|d29|c30|c31|d30|d31

  186.     |e4|e5|f4|f5|e6|e7|f6|f7|e12|e13|f12|f13|e14|e15|f14|f15|e20|e21|f20|f21|e22|e23|f22|f23|e28|e29|f28|f29|e30|e31|f30|f31

  187.     |g4|g5|h4|h5|g6|g7|h6|h7|g12|g13|h12|h13|g14|g15|h14|h15|g20|g21|h20|h21|g22|g23|h22|h23|g28|g29|h28|h29|g30|g31|h30|h31

  188. 

  189.     Step 2: 4-element interleave for matrix

  190.     |a0|a1|b0|b1|c0|c1|d0|d1|a8 |a9 |b8 |b9 |c8 |c9 |d8 |d9 |a16|a17|b16|b17|c16|c17|d16|d17|a24|a25|b24|b25|c24|c25|d24|d25

  191.     |a2|a3|b2|b3|c2|c3|d2|d3|a10|a11|b10|b11|c10|c11|d10|d11|a18|a19|b18|b19|c18|c19|d18|d19|a26|a27|b26|b27|c26|c27|d26|d27

  192.     |e0|e1|f0|f1|g0|g1|h0|h1|e8 |e9 |f8 |f9 |g8 |g9 |h8 |h9 |e16|e17|f16|f17|g16|g17|h16|h17|e24|e25|f24|f25|g24|g25|h24|h25

  193.     |e2|e3|f2|f3|g2|g3|h2|h3|e10|e11|f10|f11|g10|g11|h10|h11|e18|e19|f18|f19|g18|g19|h18|h19|e26|e27|f26|f27|g26|g27|h26|h27

  194.     |a4|a5|b4|b5|c4|c5|d4|d5|a12|a13|b12|b13|c12|c13|d12|d13|a20|a21|b20|b21|c20|c21|d20|d21|a28|a29|b28|b29|c28|c29|d28|d29

  195.     |a6|a7|b6|b7|c6|c7|d6|d7|a14|a15|b14|b15|c14|c15|d14|d15|a22|a23|b22|b23|c22|c23|d22|d23|a30|a31|b30|b31|c30|c31|d30|d31

  196.     |e4|e5|f4|f5|g4|g5|h4|h5|e12|e13|f12|f13|g12|g13|h12|h13|e20|e21|f20|f21|g20|g21|h20|h21|e28|e29|f28|f29|g28|g29|h28|h29

  197.     |e6|e7|f6|f7|g6|g7|h6|h7|e14|e15|f14|f15|g14|g15|h14|h15|e22|e23|f22|f23|g22|g23|h22|h23|e30|e31|f30|f31|g30|g31|h30|h31

  198. */

  199. #define BF16_INTERLEAVE_8x32(regArray)                                  \

  200.     regArray##_8  = _mm512_unpacklo_epi32(regArray##_0, regArray##_1);  \

  201.     regArray##_9  = _mm512_unpacklo_epi32(regArray##_2, regArray##_3);  \

  202.     regArray##_10 = _mm512_unpacklo_epi32(regArray##_4, regArray##_5);  \

  203.     regArray##_11 = _mm512_unpacklo_epi32(regArray##_6, regArray##_7);  \

  204.     regArray##_12 = _mm512_unpackhi_epi32(regArray##_0, regArray##_1);  \

  205.     regArray##_13 = _mm512_unpackhi_epi32(regArray##_2, regArray##_3);  \

  206.     regArray##_14 = _mm512_unpackhi_epi32(regArray##_4, regArray##_5);  \

  207.     regArray##_15 = _mm512_unpackhi_epi32(regArray##_6, regArray##_7);  \

  208.                                                                         \

  209.     regArray##_0 = _mm512_unpacklo_epi64(regArray##_8,  regArray##_9);  \

  210.     regArray##_1 = _mm512_unpackhi_epi64(regArray##_8,  regArray##_9);  \

  211.     regArray##_2 = _mm512_unpacklo_epi64(regArray##_10, regArray##_11); \

  212.     regArray##_3 = _mm512_unpackhi_epi64(regArray##_10, regArray##_11); \

  213.     regArray##_4 = _mm512_unpacklo_epi64(regArray##_12, regArray##_13); \

  214.     regArray##_5 = _mm512_unpackhi_epi64(regArray##_12, regArray##_13); \

  215.     regArray##_6 = _mm512_unpacklo_epi64(regArray##_14, regArray##_15); \

  216.     regArray##_7 = _mm512_unpackhi_epi64(regArray##_14, regArray##_15);

  217. 

  218. 

  219. /* 2-step interleave for matrix against 8 rows with 16 BF16 elements per row

  220.     Input  - register array of 8 rows of raw-major matrix

  221.     Output - the output of Step 2

  222. 

  223.     Step 1: 2-element interleave for matrix

  224.     |a0|a1|b0|b1|a2|a3|b2|b3|a8 |a9 |b8 |b9 |a10|a11|b10|b11

  225.     |c0|c1|d0|d1|c2|c3|d2|d3|c8 |c9 |d8 |d9 |c10|c11|d10|d11

  226.     |e0|e1|f0|f1|e2|e3|f2|f3|e8 |e9 |f8 |f9 |e10|e11|f10|f11

  227.     |g0|g1|h0|h1|g2|g3|h2|h3|g8 |g9 |h8 |h9 |g10|g11|h10|h11

  228.     |a4|a5|b4|b5|a6|a7|b6|b7|a12|a13|b12|b13|a14|a15|b14|b15

  229.     |c4|c5|d4|d5|c6|c7|d6|d7|c12|c13|d12|d13|c14|c15|d14|d15

  230.     |e4|e5|f4|f5|e6|e7|f6|f7|e12|e13|f12|f13|e14|e15|f14|f15

  231.     |g4|g5|h4|h5|g6|g7|h6|h7|g12|g13|h12|h13|g14|g15|h14|h15

  232. 

  233.     Step 2: 4-element interleave for matrix

  234.     |a0|a1|b0|b1|c0|c1|d0|d1|a8 |a9 |b8 |b9 |c8 |c9 |d8 |d9

  235.     |a2|a3|b2|b3|c2|c3|d2|d3|a10|a11|b10|b11|c10|c11|d10|d11

  236.     |e0|e1|f0|f1|g0|g1|h0|h1|e8 |e9 |f8 |f9 |g8 |g9 |h8 |h9

  237.     |e2|e3|f2|f3|g2|g3|h2|h3|e10|e11|f10|f11|g10|g11|h10|h11

  238.     |a4|a5|b4|b5|c4|c5|d4|d5|a12|a13|b12|b13|c12|c13|d12|d13

  239.     |a6|a7|b6|b7|c6|c7|d6|d7|a14|a15|b14|b15|c14|c15|d14|d15

  240.     |e4|e5|f4|f5|g4|g5|h4|h5|e12|e13|f12|f13|g12|g13|h12|h13

  241.     |e6|e7|f6|f7|g6|g7|h6|h7|e14|e15|f14|f15|g14|g15|h14|h15

  242. */

  243. #define BF16_INTERLEAVE_8x16(regArray)                                  \

  244.     regArray##_8  = _mm256_unpacklo_epi32(regArray##_0, regArray##_1);  \

  245.     regArray##_9  = _mm256_unpacklo_epi32(regArray##_2, regArray##_3);  \

  246.     regArray##_10 = _mm256_unpacklo_epi32(regArray##_4, regArray##_5);  \

  247.     regArray##_11 = _mm256_unpacklo_epi32(regArray##_6, regArray##_7);  \

  248.     regArray##_12 = _mm256_unpackhi_epi32(regArray##_0, regArray##_1);  \

  249.     regArray##_13 = _mm256_unpackhi_epi32(regArray##_2, regArray##_3);  \

  250.     regArray##_14 = _mm256_unpackhi_epi32(regArray##_4, regArray##_5);  \

  251.     regArray##_15 = _mm256_unpackhi_epi32(regArray##_6, regArray##_7);  \

  252.                                                                         \

  253.     regArray##_0  = _mm256_unpacklo_epi64(regArray##_8,  regArray##_9);    \

  254.     regArray##_1  = _mm256_unpackhi_epi64(regArray##_8,  regArray##_9);    \

  255.     regArray##_2  = _mm256_unpacklo_epi64(regArray##_10, regArray##_11);   \

  256.     regArray##_3  = _mm256_unpackhi_epi64(regArray##_10, regArray##_11);   \

  257.     regArray##_4  = _mm256_unpacklo_epi64(regArray##_12, regArray##_13);   \

  258.     regArray##_5  = _mm256_unpackhi_epi64(regArray##_12, regArray##_13);   \

  259.     regArray##_6  = _mm256_unpacklo_epi64(regArray##_14, regArray##_15);   \

  260.     regArray##_7  = _mm256_unpackhi_epi64(regArray##_14, regArray##_15);

  261. 

  262. /* 2-step interleave for matrix against 8 rows with 32 BF16 elements per row

  263.     Input  - register array of 8 rows of raw-major matrix

  264.     Output - the output of Step 2

  265. 

  266.     Step 1: 2-element interleave for matrix

  267.     |a0|a1|b0|b1|a2|a3|b2|b3|a8 |a9 |b8 |b9 |a10|a11|b10|b11|a16|a17|b16|b17|a18|a19|b18|b19|a24|a25|b24|b25|a26|a27|b26|b27

  268.     |c0|c1|d0|d1|c2|c3|d2|d3|c8 |c9 |d8 |d9 |c10|c11|d10|d11|c16|c17|d16|d17|c18|c19|d18|d19|c24|c25|d24|d25|c26|c27|d26|d27

  269.     |a4|a5|b4|b5|a6|a7|b6|b7|a12|a13|b12|b13|a14|a15|b14|b15|a20|a21|b20|b21|a22|a23|b22|b23|a28|a29|b28|b29|a30|a31|b30|b31

  270.     |c4|c5|d4|d5|c6|c7|d6|d7|c12|c13|d12|d13|c14|c15|d14|d15|c20|c21|d20|d21|c22|c23|d22|d23|c28|c29|d28|d29|c30|c31|d30|d31

  271. 

  272.     Step 2: 4-element interleave for matrix

  273.     |a0|a1|b0|b1|c0|c1|d0|d1|a8 |a9 |b8 |b9 |c8 |c9 |d8 |d9 |a16|a17|b16|b17|c16|c17|d16|d17|a24|a25|b24|b25|c24|c25|d24|d25

  274.     |a2|a3|b2|b3|c2|c3|d2|d3|a10|a11|b10|b11|c10|c11|d10|d11|a18|a19|b18|b19|c18|c19|d18|d19|a26|a27|b26|b27|c26|c27|d26|d27

  275.     |a4|a5|b4|b5|c4|c5|d4|d5|a12|a13|b12|b13|c12|c13|d12|d13|a20|a21|b20|b21|c20|c21|d20|d21|a28|a29|b28|b29|c28|c29|d28|d29

  276.     |a6|a7|b6|b7|c6|c7|d6|d7|a14|a15|b14|b15|c14|c15|d14|d15|a22|a23|b22|b23|c22|c23|d22|d23|a30|a31|b30|b31|c30|c31|d30|d31

  277. */

  278. #define BF16_INTERLEAVE_4x32(regArray)                                 \

  279.     regArray##_4 = _mm512_unpacklo_epi32(regArray##_0, regArray##_1);  \

  280.     regArray##_5 = _mm512_unpacklo_epi32(regArray##_2, regArray##_3);  \

  281.     regArray##_6 = _mm512_unpackhi_epi32(regArray##_0, regArray##_1);  \

  282.     regArray##_7 = _mm512_unpackhi_epi32(regArray##_2, regArray##_3);  \

  283.                                                                        \

  284.     regArray##_0 = _mm512_unpacklo_epi64(regArray##_4, regArray##_5);  \

  285.     regArray##_1 = _mm512_unpackhi_epi64(regArray##_4, regArray##_5);  \

  286.     regArray##_2 = _mm512_unpacklo_epi64(regArray##_6, regArray##_7);  \

  287.     regArray##_3 = _mm512_unpackhi_epi64(regArray##_6, regArray##_7);

  288. 

  289. 

  290. /* 2-step interleave for matrix against 8 rows with 16 BF16 elements per row

  291.     Input  - register array of 8 rows of raw-major matrix

  292.     Output - the output of Step 2

  293. 

  294.     Step 1: 2-element interleave for matrix

  295.     |a0|a1|b0|b1|a2|a3|b2|b3|a8 |a9 |b8 |b9 |a10|a11|b10|b11

  296.     |c0|c1|d0|d1|c2|c3|d2|d3|c8 |c9 |d8 |d9 |c10|c11|d10|d11

  297.     |a4|a5|b4|b5|a6|a7|b6|b7|a12|a13|b12|b13|a14|a15|b14|b15

  298.     |c4|c5|d4|d5|c6|c7|d6|d7|c12|c13|d12|d13|c14|c15|d14|d15

  299. 

  300.     Step 2: 4-element interleave for matrix

  301.     |a0|a1|b0|b1|c0|c1|d0|d1|a8 |a9 |b8 |b9 |c8 |c9 |d8 |d9

  302.     |a2|a3|b2|b3|c2|c3|d2|d3|a10|a11|b10|b11|c10|c11|d10|d11

  303.     |a4|a5|b4|b5|c4|c5|d4|d5|a12|a13|b12|b13|c12|c13|d12|d13

  304.     |a6|a7|b6|b7|c6|c7|d6|d7|a14|a15|b14|b15|c14|c15|d14|d15

  305. */

  306. #define BF16_INTERLEAVE_4x16(regArray)                                 \

  307.     regArray##_4 = _mm256_unpacklo_epi32(regArray##_0, regArray##_1);  \

  308.     regArray##_5 = _mm256_unpacklo_epi32(regArray##_2, regArray##_3);  \

  309.     regArray##_6 = _mm256_unpackhi_epi32(regArray##_0, regArray##_1);  \

  310.     regArray##_7 = _mm256_unpackhi_epi32(regArray##_2, regArray##_3);  \

  311.                                                                        \

  312.     regArray##_0 = _mm256_unpacklo_epi64(regArray##_4, regArray##_5);  \

  313.     regArray##_1 = _mm256_unpackhi_epi64(regArray##_4, regArray##_5);  \

  314.     regArray##_2 = _mm256_unpacklo_epi64(regArray##_6, regArray##_7);  \

  315.     regArray##_3 = _mm256_unpackhi_epi64(regArray##_6, regArray##_7);

  316. 

  317. 

  318. /* 2-step interleave for x with 32 BF16 elements

  319.     Input  - original vector

  320.     Output - the output of Step 2

  321. 

  322.     Step 1: 2-element interleave for x:

  323.     |x0|x1|x0|x1|x2|x3|x2|x3|x8 |x9 |x8 |x9 |x10|x11|x10|x11|x16|x17|x16|x17|x18|x19|x18|x19|x24|x25|x24|x25|x26|x27|x26|x27

  324.     |x4|x5|x4|x5|x6|x7|x6|x7|x12|x13|x12|x13|x14|x15|x14|x15|x20|x21|x20|x21|x22|x23|x22|x23|x28|x29|x28|x29|x30|x31|x30|x31

  325.  

  326.     Step 2: 4-element interleave for x:

  327.     |x0|x1|x0|x1|x0|x1|x0|x1|x8 |x9 |x8 |x9 |x8 |x9 |x8 |x9 |x16|x17|x16|x17|x16|x17|x16|x17|x24|x25|x24|x25|x24|x25|x24|x25

  328.     |x2|x3|x2|x3|x2|x3|x2|x3|x10|x11|x10|x11|x10|x11|x10|x11|x18|x19|x18|x19|x18|x19|x18|x19|x26|x27|x26|x27|x26|x27|x26|x27

  329.     |x4|x5|x4|x5|x4|x5|x4|x5|x12|x13|x12|x13|x12|x13|x12|x13|x20|x21|x20|x21|x20|x21|x20|x21|x28|x29|x28|x29|x28|x29|x28|x29

  330.     |x6|x7|x6|x7|x6|x7|x6|x7|x14|x15|x14|x15|x14|x15|x14|x15|x22|x23|x22|x23|x22|x23|x22|x23|x30|x31|x30|x31|x30|x31|x30|x31

  331. */

  332. #define BF16_INTERLEAVE_1x32(regArray)                                 \

  333.     regArray##_1 = _mm512_unpacklo_epi32(regArray##_0, regArray##_0);  \

  334.     regArray##_3 = _mm512_unpackhi_epi32(regArray##_0, regArray##_0);  \

  335.                                                                        \

  336.     regArray##_0 = _mm512_unpacklo_epi64(regArray##_1, regArray##_1);  \

  337.     regArray##_1 = _mm512_unpackhi_epi64(regArray##_1, regArray##_1);  \

  338.     regArray##_2 = _mm512_unpacklo_epi64(regArray##_3, regArray##_3);  \

  339.     regArray##_3 = _mm512_unpackhi_epi64(regArray##_3, regArray##_3);

  340. 

  341. 

  342. /* 2-step interleave for x with 16 BF16 elements

  343.     Input  - original vector

  344.     Output - the output of Step 2

  345. 

  346.     Step 1: 2-element interleave for x:

  347.     |x0|x1|x0|x1|x2|x3|x2|x3|x8 |x9 |x8 |x9 |x10|x11|x10|x11

  348.     |x4|x5|x4|x5|x6|x7|x6|x7|x12|x13|x12|x13|x14|x15|x14|x15

  349. 

  350.     Step 2: 4-element interleave for x:

  351.     |x0|x1|x0|x1|x0|x1|x0|x1|x8 |x9 |x8 |x9 |x8 |x9 |x8 |x9

  352.     |x2|x3|x2|x3|x2|x3|x2|x3|x10|x11|x10|x11|x10|x11|x10|x11

  353.     |x4|x5|x4|x5|x4|x5|x4|x5|x12|x13|x12|x13|x12|x13|x12|x13

  354.     |x6|x7|x6|x7|x6|x7|x6|x7|x14|x15|x14|x15|x14|x15|x14|x15

  355. */

  356. #define BF16_INTERLEAVE_1x16(regArray)                                 \

  357.     regArray##_1 = _mm256_unpacklo_epi32(regArray##_0, regArray##_0);  \

  358.     regArray##_3 = _mm256_unpackhi_epi32(regArray##_0, regArray##_0);  \

  359.                                                                        \

  360.     regArray##_0 = _mm256_unpacklo_epi64(regArray##_1, regArray##_1);  \

  361.     regArray##_1 = _mm256_unpackhi_epi64(regArray##_1, regArray##_1);  \

  362.     regArray##_2 = _mm256_unpacklo_epi64(regArray##_3, regArray##_3);  \

  363.     regArray##_3 = _mm256_unpackhi_epi64(regArray##_3, regArray##_3);

  364. 

  365. /* 1-step interleave to exchange the high-256s bit and low-256 bits of 4 pair of registers

  366.    |a0|a1|...|a14|a15|i0|i1|...|i14|i15|

  367.    |b0|b1|...|b14|b15|j0|j1|...|j14|j15|

  368.    |c0|c1|...|c14|c15|k0|k1|...|k14|k15|

  369.    |d0|d1|...|d14|d15|l0|l1|...|l14|l15|

  370.    |e0|e1|...|e14|e15|m0|m1|...|m14|m15|

  371.    |f0|f1|...|f14|f15|n0|n1|...|n14|n15|

  372.    |g0|g1|...|g14|g15|o0|o1|...|o14|o15|

  373.    |h0|h1|...|h14|h15|p0|p1|...|p14|p15|

  374. */

  375. #define BF16_INTERLEAVE256_8x32(regArray)                                     \

  376.     regArray##_0 = _mm512_shuffle_i32x4(regArray##_8,  regArray##_12, 0x44);  \

  377.     regArray##_1 = _mm512_shuffle_i32x4(regArray##_8,  regArray##_12, 0xee);  \

  378.     regArray##_2 = _mm512_shuffle_i32x4(regArray##_9,  regArray##_13, 0x44);  \

  379.     regArray##_3 = _mm512_shuffle_i32x4(regArray##_9,  regArray##_13, 0xee);  \

  380.     regArray##_4 = _mm512_shuffle_i32x4(regArray##_10, regArray##_14, 0x44);  \

  381.     regArray##_5 = _mm512_shuffle_i32x4(regArray##_10, regArray##_14, 0xee);  \

  382.     regArray##_6 = _mm512_shuffle_i32x4(regArray##_11, regArray##_15, 0x44);  \

  383.     regArray##_7 = _mm512_shuffle_i32x4(regArray##_11, regArray##_15, 0xee);

  384. 

  385. 

  386. /* 1-step interleave to exchange the high-256s bit and low-256 bits of 2 pair of registers

  387.    |a0|a1|...|a14|a15|e0|e1|...|e14|e15|

  388.    |b0|b1|...|b14|b15|f0|f1|...|f14|f15|

  389.    |c0|c1|...|c14|c15|g0|g1|...|g14|g15|

  390.    |d0|d1|...|d14|d15|h0|h1|...|h14|h15|

  391. */

  392. #define BF16_INTERLEAVE256_4x32(regArray)                                    \

  393.     regArray##_0 = _mm512_shuffle_i32x4(regArray##_4,  regArray##_6, 0x44);  \

  394.     regArray##_1 = _mm512_shuffle_i32x4(regArray##_4,  regArray##_6, 0xee);  \

  395.     regArray##_2 = _mm512_shuffle_i32x4(regArray##_5,  regArray##_7, 0x44);  \

  396.     regArray##_3 = _mm512_shuffle_i32x4(regArray##_5,  regArray##_7, 0xee);

  397. 

  398. 

  399. #define BF16_PERMUTE_8x32(idx, regArray) \

  400.     regArray##_8  = _mm512_permutexvar_epi16(idx, regArray##_0);  \

  401.     regArray##_9  = _mm512_permutexvar_epi16(idx, regArray##_1);  \

  402.     regArray##_10 = _mm512_permutexvar_epi16(idx, regArray##_2);  \

  403.     regArray##_11 = _mm512_permutexvar_epi16(idx, regArray##_3);  \

  404.     regArray##_12 = _mm512_permutexvar_epi16(idx, regArray##_4);  \

  405.     regArray##_13 = _mm512_permutexvar_epi16(idx, regArray##_5);  \

  406.     regArray##_14 = _mm512_permutexvar_epi16(idx, regArray##_6);  \

  407.     regArray##_15 = _mm512_permutexvar_epi16(idx, regArray##_7);

  408. 

  409. 

  410. #define BF16_PERMUTE_8x32_2(idx, regArray) \

  411.     regArray##_8  = _mm512_permutexvar_epi32(idx, regArray##_0);  \

  412.     regArray##_9  = _mm512_permutexvar_epi32(idx, regArray##_1);  \

  413.     regArray##_10 = _mm512_permutexvar_epi32(idx, regArray##_2);  \

  414.     regArray##_11 = _mm512_permutexvar_epi32(idx, regArray##_3);  \

  415.     regArray##_12 = _mm512_permutexvar_epi32(idx, regArray##_4);  \

  416.     regArray##_13 = _mm512_permutexvar_epi32(idx, regArray##_5);  \

  417.     regArray##_14 = _mm512_permutexvar_epi32(idx, regArray##_6);  \

  418.     regArray##_15 = _mm512_permutexvar_epi32(idx, regArray##_7);

  419. 

  420. 

  421. #define BF16_PERMUTE_4x32(idx, regArray) \

  422.     regArray##_4 = _mm512_permutexvar_epi16(idx, regArray##_0);  \

  423.     regArray##_5 = _mm512_permutexvar_epi16(idx, regArray##_1);  \

  424.     regArray##_6 = _mm512_permutexvar_epi16(idx, regArray##_2);  \

  425.     regArray##_7 = _mm512_permutexvar_epi16(idx, regArray##_3);

  426. 

  427. 

  428. #define BF16_PERMUTE_4x32_2(idx, regArray) \

  429.     regArray##_4 = _mm512_permutexvar_epi32(idx, regArray##_0);  \

  430.     regArray##_5 = _mm512_permutexvar_epi32(idx, regArray##_1);  \

  431.     regArray##_6 = _mm512_permutexvar_epi32(idx, regArray##_2);  \

  432.     regArray##_7 = _mm512_permutexvar_epi32(idx, regArray##_3);

  433. 

  434. 

  435. /* Calculate the dot result for 2-step interleaved matrix and vector

  436.    (Assume throughput for _mm512_dpbf16_ps is 0.5, tunable per platform)

  437. */

  438. #define BF16_2STEP_INTERLEAVED_DOT_8x32(accumArray, matArray, xArray)                                   \

  439.     accumArray##_0 = _mm512_dpbf16_ps(accumArray##_0, (__m512bh) matArray##_0, (__m512bh) xArray##_0);  \

  440.     accumArray##_1 = _mm512_dpbf16_ps(accumArray##_1, (__m512bh) matArray##_2, (__m512bh) xArray##_0);  \

  441.     accumArray##_0 = _mm512_dpbf16_ps(accumArray##_0, (__m512bh) matArray##_1, (__m512bh) xArray##_1);  \

  442.     accumArray##_1 = _mm512_dpbf16_ps(accumArray##_1, (__m512bh) matArray##_3, (__m512bh) xArray##_1);  \

  443.     accumArray##_0 = _mm512_dpbf16_ps(accumArray##_0, (__m512bh) matArray##_4, (__m512bh) xArray##_2);  \

  444.     accumArray##_1 = _mm512_dpbf16_ps(accumArray##_1, (__m512bh) matArray##_6, (__m512bh) xArray##_2);  \

  445.     accumArray##_0 = _mm512_dpbf16_ps(accumArray##_0, (__m512bh) matArray##_5, (__m512bh) xArray##_3);  \

  446.     accumArray##_1 = _mm512_dpbf16_ps(accumArray##_1, (__m512bh) matArray##_7, (__m512bh) xArray##_3);

  447. 

  448. 

  449. /* Calculate the dot result for 2-step interleaved matrix and vector

  450.    (Assume throughput for _mm256_dpbf16_ps is 0.5, tunable per platform)

  451. */

  452. #define BF16_2STEP_INTERLEAVED_DOT_8x16(accumArray, matArray, xArray)                                   \

  453.     accumArray##_0 = _mm256_dpbf16_ps(accumArray##_0, (__m256bh) matArray##_0, (__m256bh) xArray##_0);  \

  454.     accumArray##_1 = _mm256_dpbf16_ps(accumArray##_1, (__m256bh) matArray##_2, (__m256bh) xArray##_0);  \

  455.     accumArray##_0 = _mm256_dpbf16_ps(accumArray##_0, (__m256bh) matArray##_1, (__m256bh) xArray##_1);  \

  456.     accumArray##_1 = _mm256_dpbf16_ps(accumArray##_1, (__m256bh) matArray##_3, (__m256bh) xArray##_1);  \

  457.     accumArray##_0 = _mm256_dpbf16_ps(accumArray##_0, (__m256bh) matArray##_4, (__m256bh) xArray##_2);  \

  458.     accumArray##_1 = _mm256_dpbf16_ps(accumArray##_1, (__m256bh) matArray##_6, (__m256bh) xArray##_2);  \

  459.     accumArray##_0 = _mm256_dpbf16_ps(accumArray##_0, (__m256bh) matArray##_5, (__m256bh) xArray##_3);  \

  460.     accumArray##_1 = _mm256_dpbf16_ps(accumArray##_1, (__m256bh) matArray##_7, (__m256bh) xArray##_3);

  461. 

  462. /* Calculate the dot result for 2-step interleaved matrix and vector

  463.    (Assume throughput for _mm512_dpbf16_ps is 0.5, tunable per platform)

  464. */

  465. #define BF16_2STEP_INTERLEAVED_DOT_4x32(accumArray, matArray, xArray)                                   \

  466.     accumArray##_0 = _mm512_dpbf16_ps(accumArray##_0, (__m512bh) matArray##_0, (__m512bh) xArray##_0);  \

  467.     accumArray##_1 = _mm512_dpbf16_ps(accumArray##_1, (__m512bh) matArray##_1, (__m512bh) xArray##_1);  \

  468.     accumArray##_0 = _mm512_dpbf16_ps(accumArray##_0, (__m512bh) matArray##_2, (__m512bh) xArray##_2);  \

  469.     accumArray##_1 = _mm512_dpbf16_ps(accumArray##_1, (__m512bh) matArray##_3, (__m512bh) xArray##_3);

  470. 

  471. 

  472. /* Calculate the dot result for 2-step interleaved matrix and vector

  473.    (Assume throughput for _mm256_dpbf16_ps is 0.5, tunable per platform)

  474. */

  475. #define BF16_2STEP_INTERLEAVED_DOT_4x16(accumArray, matArray, xArray)                                   \

  476.     accumArray##_0 = _mm256_dpbf16_ps(accumArray##_0, (__m256bh) matArray##_0, (__m256bh) xArray##_0);  \

  477.     accumArray##_1 = _mm256_dpbf16_ps(accumArray##_1, (__m256bh) matArray##_1, (__m256bh) xArray##_1);  \

  478.     accumArray##_0 = _mm256_dpbf16_ps(accumArray##_0, (__m256bh) matArray##_2, (__m256bh) xArray##_2);  \

  479.     accumArray##_1 = _mm256_dpbf16_ps(accumArray##_1, (__m256bh) matArray##_3, (__m256bh) xArray##_3);

  480. 

  481. 

  482. /* Calculate the dot result for matrix and vector at 32 elements per row

  483.    (Assume throughput for _mm512_dpbf16_ps is 0.5, tunable per platform)

  484. */

  485. #define BF16_DOT_8x32(accumArray, matArray, xArray)                                                 \

  486.     accumArray##_0 = _mm512_dpbf16_ps(accumArray##_0, (__m512bh) matArray##_0, (__m512bh) xArray);  \

  487.     accumArray##_1 = _mm512_dpbf16_ps(accumArray##_1, (__m512bh) matArray##_1, (__m512bh) xArray);  \

  488.     accumArray##_2 = _mm512_dpbf16_ps(accumArray##_2, (__m512bh) matArray##_2, (__m512bh) xArray);  \

  489.     accumArray##_3 = _mm512_dpbf16_ps(accumArray##_3, (__m512bh) matArray##_3, (__m512bh) xArray);  \

  490.     accumArray##_4 = _mm512_dpbf16_ps(accumArray##_4, (__m512bh) matArray##_4, (__m512bh) xArray);  \

  491.     accumArray##_5 = _mm512_dpbf16_ps(accumArray##_5, (__m512bh) matArray##_5, (__m512bh) xArray);  \

  492.     accumArray##_6 = _mm512_dpbf16_ps(accumArray##_6, (__m512bh) matArray##_6, (__m512bh) xArray);  \

  493.     accumArray##_7 = _mm512_dpbf16_ps(accumArray##_7, (__m512bh) matArray##_7, (__m512bh) xArray);

  494. 

  495. /* Calculate the dot result for matrix and vector at 32 elements per row

  496.    (Assume throughput for _mm512_dpbf16_ps is 0.5, tunable per platform)

  497. */

  498. #define BF16_DOT_1x32(accumArray, matArray, xArray)                                                 \

  499.     accumArray = _mm512_dpbf16_ps(accumArray, (__m512bh) matArray, (__m512bh) xArray);

  500. 

  501. /* Calculate the dot result for matrix and vector at 16 elements per row

  502.    (Assume throughput for _mm256_dpbf16_ps is 0.5, tunable per platform)

  503. */

  504. #define BF16_DOT_8x16(accumArray, matArray, xArray)                                                 \

  505.     accumArray##_0 = _mm256_dpbf16_ps(accumArray##_0, (__m256bh) matArray##_0, (__m256bh) xArray);  \

  506.     accumArray##_1 = _mm256_dpbf16_ps(accumArray##_1, (__m256bh) matArray##_1, (__m256bh) xArray);  \

  507.     accumArray##_2 = _mm256_dpbf16_ps(accumArray##_2, (__m256bh) matArray##_2, (__m256bh) xArray);  \

  508.     accumArray##_3 = _mm256_dpbf16_ps(accumArray##_3, (__m256bh) matArray##_3, (__m256bh) xArray);  \

  509.     accumArray##_4 = _mm256_dpbf16_ps(accumArray##_4, (__m256bh) matArray##_4, (__m256bh) xArray);  \

  510.     accumArray##_5 = _mm256_dpbf16_ps(accumArray##_5, (__m256bh) matArray##_5, (__m256bh) xArray);  \

  511.     accumArray##_6 = _mm256_dpbf16_ps(accumArray##_6, (__m256bh) matArray##_6, (__m256bh) xArray);  \

  512.     accumArray##_7 = _mm256_dpbf16_ps(accumArray##_7, (__m256bh) matArray##_7, (__m256bh) xArray);

  513. 

  514. 

  515. /* 2-step interleave for matrix against 8 rows with 16 fp32 elements per row

  516.     Input  - register array of 8 rows of raw-major matrix

  517.     Output - the output of Step 2

  518. 

  519.     Step 1: 2-element interleave for matrix

  520.     |a0|b0|a1|b1|a4|b4|a5|b5|a8 |b8 |a9 |b9 |a12|b12|a13|b13|

  521.     |c0|d0|c1|d1|c4|d4|c5|d5|c8 |d8 |c9 |d9 |c12|d12|c13|d13|

  522.     |e0|f0|e1|f1|e4|f4|e5|f5|e8 |f8 |e9 |f9 |e12|f12|e13|f13|

  523.     |g0|h0|g1|h1|g4|h4|g5|h5|g8 |h8 |g9 |h9 |g12|h12|g13|h13|

  524.     |a2|b2|a3|b3|a6|b6|a7|b7|a10|b10|a11|b11|a14|b14|a15|b15|

  525.     |c2|d2|c3|d3|c6|d6|c7|d7|c10|d10|c11|d11|c14|d14|c15|d15|

  526.     |e2|f2|e3|f3|e6|f6|e7|f7|e10|f10|e11|f11|e14|f14|e15|f15|

  527.     |g2|h2|g3|h3|g6|h6|g7|h7|g10|h10|g11|h11|g14|h14|g15|h15|

  528. 

  529.     Step 2: 4-element interleave for matrix

  530.     |a0|b0|c0|d0|a4|b4|c4|d4|a8 |b8 |c8 |d8 |a12|b12|c12|d12|

  531.     |a1|b1|c1|d1|a5|b5|c5|d5|a9 |b9 |c9 |d9 |a13|b13|c13|d13|

  532.     |e0|f0|g0|h0|e4|f4|g4|h4|e8 |f8 |g8 |h8 |e12|f12|g12|h12|

  533.     |e1|f1|g1|h1|e5|f5|g5|h5|e9 |f9 |g9 |h9 |e13|f13|g13|h13|

  534.     |a2|b2|c2|d2|a6|b6|c6|d6|a10|b10|c10|d10|a14|b14|c14|d14|

  535.     |a3|b3|c3|d3|a7|b7|c7|d7|a11|b11|c11|d11|a15|b15|c15|d15|

  536.     |e2|f2|g2|h2|e6|f6|g6|h6|e10|f10|g10|h10|e14|f14|g14|h14|

  537.     |e3|f3|g3|h3|e7|f7|g7|h7|e11|f11|g11|h11|e15|f15|g15|h15|

  538. */

  539. #define FP32_INTERLEAVE_8x16(regArray)                               \

  540.     regArray##_8  = _mm512_unpacklo_ps(regArray##_0, regArray##_1);  \

  541.     regArray##_9  = _mm512_unpacklo_ps(regArray##_2, regArray##_3);  \

  542.     regArray##_10 = _mm512_unpacklo_ps(regArray##_4, regArray##_5);  \

  543.     regArray##_11 = _mm512_unpacklo_ps(regArray##_6, regArray##_7);  \

  544.     regArray##_12 = _mm512_unpackhi_ps(regArray##_0, regArray##_1);  \

  545.     regArray##_13 = _mm512_unpackhi_ps(regArray##_2, regArray##_3);  \

  546.     regArray##_14 = _mm512_unpackhi_ps(regArray##_4, regArray##_5);  \

  547.     regArray##_15 = _mm512_unpackhi_ps(regArray##_6, regArray##_7);  \

  548.                                                                      \

  549.     regArray##_0 = (__m512) _mm512_unpacklo_pd((__m512d) regArray##_8,  (__m512d) regArray##_9);  \

  550.     regArray##_1 = (__m512) _mm512_unpackhi_pd((__m512d) regArray##_8,  (__m512d) regArray##_9);  \

  551.     regArray##_4 = (__m512) _mm512_unpacklo_pd((__m512d) regArray##_10, (__m512d) regArray##_11); \

  552.     regArray##_5 = (__m512) _mm512_unpackhi_pd((__m512d) regArray##_10, (__m512d) regArray##_11); \

  553.     regArray##_2 = (__m512) _mm512_unpacklo_pd((__m512d) regArray##_12, (__m512d) regArray##_13); \

  554.     regArray##_3 = (__m512) _mm512_unpackhi_pd((__m512d) regArray##_12, (__m512d) regArray##_13); \

  555.     regArray##_6 = (__m512) _mm512_unpacklo_pd((__m512d) regArray##_14, (__m512d) regArray##_15); \

  556.     regArray##_7 = (__m512) _mm512_unpackhi_pd((__m512d) regArray##_14, (__m512d) regArray##_15);

  557. 

  558. #define FP32_INTERLEAVE_8x16_ARRAY(regArray)                               \

  559.     regArray[8]  = _mm512_unpacklo_ps(regArray[0], regArray[1]);  \

  560.     regArray[9]  = _mm512_unpacklo_ps(regArray[2], regArray[3]);  \

  561.     regArray[10] = _mm512_unpacklo_ps(regArray[4], regArray[5]);  \

  562.     regArray[11] = _mm512_unpacklo_ps(regArray[6], regArray[7]);  \

  563.     regArray[12] = _mm512_unpackhi_ps(regArray[0], regArray[1]);  \

  564.     regArray[13] = _mm512_unpackhi_ps(regArray[2], regArray[3]);  \

  565.     regArray[14] = _mm512_unpackhi_ps(regArray[4], regArray[5]);  \

  566.     regArray[15] = _mm512_unpackhi_ps(regArray[6], regArray[7]);  \

  567.                                                                      \

  568.     regArray[0] = (__m512) _mm512_unpacklo_pd((__m512d) regArray[8],  (__m512d) regArray[9]);  \

  569.     regArray[1] = (__m512) _mm512_unpackhi_pd((__m512d) regArray[8],  (__m512d) regArray[9]);  \

  570.     regArray[4] = (__m512) _mm512_unpacklo_pd((__m512d) regArray[10], (__m512d) regArray[11]); \

  571.     regArray[5] = (__m512) _mm512_unpackhi_pd((__m512d) regArray[10], (__m512d) regArray[11]); \

  572.     regArray[2] = (__m512) _mm512_unpacklo_pd((__m512d) regArray[12], (__m512d) regArray[13]); \

  573.     regArray[3] = (__m512) _mm512_unpackhi_pd((__m512d) regArray[12], (__m512d) regArray[13]); \

  574.     regArray[6] = (__m512) _mm512_unpacklo_pd((__m512d) regArray[14], (__m512d) regArray[15]); \

  575.     regArray[7] = (__m512) _mm512_unpackhi_pd((__m512d) regArray[14], (__m512d) regArray[15]);

  576. 

  577. /* 2-step interleave for matrix against 8 rows with 8 fp32 elements per row

  578.     Input  - register array of 8 rows of raw-major matrix

  579.     Output - the output of Step 2

  580. 

  581.     Step 1: 2-element interleave for matrix

  582.     |a0|b0|a1|b1|a4|b4|a5|b5|

  583.     |c0|d0|c1|d1|c4|d4|c5|d5|

  584.     |e0|f0|e1|f1|e4|f4|e5|f5|

  585.     |g0|h0|g1|h1|g4|h4|g5|h5|

  586.     |a2|b2|a3|b3|a6|b6|a7|b7|

  587.     |c2|d2|c3|d3|c6|d6|c7|d7|

  588.     |e2|f2|e3|f3|e6|f6|e7|f7|

  589.     |g2|h2|g3|h3|g6|h6|g7|h7|

  590. 

  591.     Step 2: 4-element interleave for matrix

  592.     |a0|b0|c0|d0|a4|b4|c4|d4|

  593.     |a1|b1|c1|d1|a5|b5|c5|d5|

  594.     |e0|f0|g0|h0|e4|f4|g4|h4|

  595.     |e1|f1|g1|h1|e5|f5|g5|h5|

  596.     |a2|b2|c2|d2|a6|b6|c6|d6|

  597.     |a3|b3|c3|d3|a7|b7|c7|d7|

  598.     |e2|f2|g2|h2|e6|f6|g6|h6|

  599.     |e3|f3|g3|h3|e7|f7|g7|h7|

  600. */

  601. #define FP32_INTERLEAVE_8x8(regArray)                                \

  602.     regArray##_8  = _mm256_unpacklo_ps(regArray##_0, regArray##_1);  \

  603.     regArray##_9  = _mm256_unpacklo_ps(regArray##_2, regArray##_3);  \

  604.     regArray##_10 = _mm256_unpacklo_ps(regArray##_4, regArray##_5);  \

  605.     regArray##_11 = _mm256_unpacklo_ps(regArray##_6, regArray##_7);  \

  606.     regArray##_12 = _mm256_unpackhi_ps(regArray##_0, regArray##_1);  \

  607.     regArray##_13 = _mm256_unpackhi_ps(regArray##_2, regArray##_3);  \

  608.     regArray##_14 = _mm256_unpackhi_ps(regArray##_4, regArray##_5);  \

  609.     regArray##_15 = _mm256_unpackhi_ps(regArray##_6, regArray##_7);  \

  610.                                                                      \

  611.     regArray##_0 = (__m256) _mm256_unpacklo_pd((__m256d) regArray##_8,  (__m256d) regArray##_9);  \

  612.     regArray##_1 = (__m256) _mm256_unpackhi_pd((__m256d) regArray##_8,  (__m256d) regArray##_9);  \

  613.     regArray##_4 = (__m256) _mm256_unpacklo_pd((__m256d) regArray##_10, (__m256d) regArray##_11); \

  614.     regArray##_5 = (__m256) _mm256_unpackhi_pd((__m256d) regArray##_10, (__m256d) regArray##_11); \

  615.     regArray##_2 = (__m256) _mm256_unpacklo_pd((__m256d) regArray##_12, (__m256d) regArray##_13); \

  616.     regArray##_3 = (__m256) _mm256_unpackhi_pd((__m256d) regArray##_12, (__m256d) regArray##_13); \

  617.     regArray##_6 = (__m256) _mm256_unpacklo_pd((__m256d) regArray##_14, (__m256d) regArray##_15); \

  618.     regArray##_7 = (__m256) _mm256_unpackhi_pd((__m256d) regArray##_14, (__m256d) regArray##_15);

  619. 

  620. 

  621. /* Accumulate the result for 2 batch of 4-registers

  622. */

  623. #define FP32_ACCUM2_8x16(regArray)                             \

  624.     regArray##_0 = _mm512_add_ps(regArray##_0, regArray##_1);  \

  625.     regArray##_2 = _mm512_add_ps(regArray##_2, regArray##_3);  \

  626.     regArray##_4 = _mm512_add_ps(regArray##_4, regArray##_5);  \

  627.     regArray##_6 = _mm512_add_ps(regArray##_6, regArray##_7);  \

  628.     regArray##_0 = _mm512_add_ps(regArray##_0, regArray##_2);  \

  629.     regArray##_4 = _mm512_add_ps(regArray##_4, regArray##_6);

  630. 

  631. #define FP32_ACCUM2_8x16_ARRAY(regArray)                             \

  632.     regArray[0] = _mm512_add_ps(regArray[0], regArray[1]);  \

  633.     regArray[2] = _mm512_add_ps(regArray[2], regArray[3]);  \

  634.     regArray[4] = _mm512_add_ps(regArray[4], regArray[5]);  \

  635.     regArray[6] = _mm512_add_ps(regArray[6], regArray[7]);  \

  636.     regArray[0] = _mm512_add_ps(regArray[0], regArray[2]);  \

  637.     regArray[4] = _mm512_add_ps(regArray[4], regArray[6]);

  638. 

  639. /* Accumulate the result for 2 batch of 4-registers

  640. */

  641. #define FP32_ACCUM2_8x8(regArray)                              \

  642.     regArray##_0 = _mm256_add_ps(regArray##_0, regArray##_1);  \

  643.     regArray##_2 = _mm256_add_ps(regArray##_2, regArray##_3);  \

  644.     regArray##_4 = _mm256_add_ps(regArray##_4, regArray##_5);  \

  645.     regArray##_6 = _mm256_add_ps(regArray##_6, regArray##_7);  \

  646.     regArray##_0 = _mm256_add_ps(regArray##_0, regArray##_2);  \

  647.     regArray##_4 = _mm256_add_ps(regArray##_4, regArray##_6);

  648. 

  649. 

  650. /* Store 16 (alpha * result + beta * y) to y

  651. */

  652. #define STORE16_COMPLETE_RESULT_ALPHA_BETA(regResult, targetAddr)                                                 \

  653.     regResult = _mm512_fmadd_ps(ALPHAVECTOR, regResult, _mm512_mul_ps(BETAVECTOR, _mm512_loadu_ps(targetAddr)));  \

  654.     _mm512_storeu_ps(targetAddr, regResult);

  655. 

  656. 

  657. /* Masked store 16 (alpha * result + beta * y) to y

  658. */

  659. #define STORE16_MASK_COMPLETE_RESULT_ALPHA_BETA(regResult, targetAddr, mask)                                                  \

  660.     regResult = _mm512_fmadd_ps(ALPHAVECTOR, regResult, _mm512_mul_ps(BETAVECTOR, _mm512_maskz_loadu_ps(mask, targetAddr)));  \

  661.     _mm512_mask_storeu_ps(targetAddr, mask, regResult);

  662. 

  663. 

  664. /* Store 8 (alpha * result + beta * y) to y

  665. */

  666. #define STORE8_COMPLETE_RESULT_ALPHA_BETA(regResult, targetAddr)                                                                                                  \

  667.     regResult = _mm256_fmadd_ps(_mm512_castps512_ps256(ALPHAVECTOR), regResult, _mm256_mul_ps(_mm512_castps512_ps256(BETAVECTOR), _mm256_loadu_ps(targetAddr)));  \

  668.     _mm256_storeu_ps(targetAddr, regResult);

  669. 

  670. 

  671. /* Masked store 8 (alpha * result + beta * y) to y

  672. */

  673. #define STORE8_MASK_COMPLETE_RESULT_ALPHA_BETA(regResult, targetAddr, mask)                                                                                                   \

  674.     regResult = _mm256_fmadd_ps(_mm512_castps512_ps256(ALPHAVECTOR), regResult, _mm256_mul_ps(_mm512_castps512_ps256(BETAVECTOR), _mm256_maskz_loadu_ps(mask, targetAddr)));  \

  675.     _mm256_mask_storeu_ps(targetAddr, mask, regResult);

  676. 

  677. 

  678. /* Store 4 (alpha * result + beta * y) to y

  679. */

  680. #define STORE4_COMPLETE_RESULT_ALPHA_BETA(regResult, targetAddr)                                                                                         \

  681.     regResult = _mm_fmadd_ps(_mm512_castps512_ps128(ALPHAVECTOR), regResult, _mm_mul_ps(_mm512_castps512_ps128(BETAVECTOR), _mm_loadu_ps(targetAddr)));  \

  682.     _mm_storeu_ps(targetAddr, regResult);

  683. 

  684. 

  685. /* Masked store 4 (alpha * result + beta * y) to y

  686. */

  687. #define STORE4_MASK_COMPLETE_RESULT_ALPHA_BETA(regResult, targetAddr, mask)                                                                                          \

  688.     regResult = _mm_fmadd_ps(_mm512_castps512_ps128(ALPHAVECTOR), regResult, _mm_mul_ps(_mm512_castps512_ps128(BETAVECTOR), _mm_maskz_loadu_ps(mask, targetAddr)));  \

  689.     _mm_mask_storeu_ps(targetAddr, mask, regResult);

  690. 

  691. 

  692. /* Store 16 (alpha * result + y) to y

  693. */

  694. #define STORE16_COMPLETE_RESULT_ALPHA_ONE(regResult, targetAddr)                       \

  695.     regResult = _mm512_fmadd_ps(ALPHAVECTOR, regResult, _mm512_loadu_ps(targetAddr));  \

  696.     _mm512_storeu_ps(targetAddr, regResult);

  697. 

  698. 

  699. /* Masked store 16 (alpha * result + y) to y

  700. */

  701. #define STORE16_MASK_COMPLETE_RESULT_ALPHA_ONE(regResult, targetAddr, mask)                        \

  702.     regResult = _mm512_fmadd_ps(ALPHAVECTOR, regResult, _mm512_maskz_loadu_ps(mask, targetAddr));  \

  703.     _mm512_mask_storeu_ps(targetAddr, mask, regResult);

  704. 

  705. 

  706. /* Store 8 (alpha * result + y) to y

  707. */

  708. #define STORE8_COMPLETE_RESULT_ALPHA_ONE(regResult, targetAddr)                                                \

  709.     regResult = _mm256_fmadd_ps(_mm512_castps512_ps256(ALPHAVECTOR), regResult, _mm256_loadu_ps(targetAddr));  \

  710.     _mm256_storeu_ps(targetAddr, regResult);

  711. 

  712. 

  713. /* Masked store 8 (alpha * result + y) to y

  714. */

  715. #define STORE8_MASK_COMPLETE_RESULT_ALPHA_ONE(regResult, targetAddr, mask)                                                 \

  716.     regResult = _mm256_fmadd_ps(_mm512_castps512_ps256(ALPHAVECTOR), regResult, _mm256_maskz_loadu_ps(mask, targetAddr));  \

  717.     _mm256_mask_storeu_ps(targetAddr, mask, regResult);

  718. 

  719. 

  720. /* Store 4 (alpha * result + y) to y

  721. */

  722. #define STORE4_COMPLETE_RESULT_ALPHA_ONE(regResult, targetAddr)                                          \

  723.     regResult = _mm_fmadd_ps(_mm512_castps512_ps128(ALPHAVECTOR), regResult, _mm_loadu_ps(targetAddr));  \

  724.     _mm_storeu_ps(targetAddr, regResult);

  725. 

  726. 

  727. /* Masked store 4 (alpha * result + y) to y

  728. */

  729. #define STORE4_MASK_COMPLETE_RESULT_ALPHA_ONE(regResult, targetAddr, mask)                                           \

  730.     regResult = _mm_fmadd_ps(_mm512_castps512_ps128(ALPHAVECTOR), regResult, _mm_maskz_loadu_ps(mask, targetAddr));  \

  731.     _mm_mask_storeu_ps(targetAddr, mask, regResult);

  732. 

  733. 

  734. /* Store 16 (result + y) to y

  735. */

  736. #define STORE16_COMPLETE_RESULT_ONE_ONE(regResult, targetAddr)          \

  737.     regResult = _mm512_add_ps(regResult, _mm512_loadu_ps(targetAddr));  \

  738.     _mm512_storeu_ps(targetAddr, regResult);

  739. 

  740. 

  741. /* Masked store 16 (result + y) to y

  742. */

  743. #define STORE16_MASK_COMPLETE_RESULT_ONE_ONE(regResult, targetAddr, mask)           \

  744.     regResult = _mm512_add_ps(regResult, _mm512_maskz_loadu_ps(mask, targetAddr));  \

  745.     _mm512_mask_storeu_ps(targetAddr, mask, regResult);

  746. 

  747. 

  748. /* Store 8 (result + y) to y

  749. */

  750. #define STORE8_COMPLETE_RESULT_ONE_ONE(regResult, targetAddr)           \

  751.     regResult = _mm256_add_ps(regResult, _mm256_loadu_ps(targetAddr));  \

  752.     _mm256_storeu_ps(targetAddr, regResult);

  753. 

  754. 

  755. /* Masked store 8 (result + y) to y

  756. */

  757. #define STORE8_MASK_COMPLETE_RESULT_ONE_ONE(regResult, targetAddr, mask)            \

  758.     regResult = _mm256_add_ps(regResult, _mm256_maskz_loadu_ps(mask, targetAddr));  \

  759.     _mm256_mask_storeu_ps(targetAddr, mask, regResult);

  760. 

  761. 

  762. /* Store 4 (result + y) to y

  763. */

  764. #define STORE4_COMPLETE_RESULT_ONE_ONE(regResult, targetAddr)     \

  765.     regResult = _mm_add_ps(regResult, _mm_loadu_ps(targetAddr));  \

  766.     _mm_storeu_ps(targetAddr, regResult);

  767. 

  768. 

  769. /* Masked store 4 (result + y) to y

  770. */

  771. #define STORE4_MASK_COMPLETE_RESULT_ONE_ONE(regResult, targetAddr, mask)      \

  772.     regResult = _mm_add_ps(regResult, _mm_maskz_loadu_ps(mask, targetAddr));  \

  773.     _mm_mask_storeu_ps(targetAddr, mask, regResult);

  774. 

  775. 

  776. /* Store 16 (alpha * result) to y

  777. */

  778. #define STORE16_COMPLETE_RESULT_ALPHA(regResult, targetAddr)  \

  779.     _mm512_storeu_ps(targetAddr, _mm512_mul_ps(ALPHAVECTOR, regResult));

  780. 

  781. 

  782. /* Masked store 16 (alpha * result) to y

  783. */

  784. #define STORE16_MASK_COMPLETE_RESULT_ALPHA(regResult, targetAddr, mask)  \

  785.     _mm512_mask_storeu_ps(targetAddr, mask, _mm512_mul_ps(ALPHAVECTOR, regResult));

  786. 

  787. 

  788. /* Store 8 (alpha * result) to y

  789. */

  790. #define STORE8_COMPLETE_RESULT_ALPHA(regResult, targetAddr)  \

  791.     _mm256_storeu_ps(targetAddr, _mm256_mul_ps(_mm512_castps512_ps256(ALPHAVECTOR), regResult));

  792. 

  793. 

  794. /* Masked store 8 (alpha * result) to y

  795. */

  796. #define STORE8_MASK_COMPLETE_RESULT_ALPHA(regResult, targetAddr, mask)  \

  797.     _mm256_mask_storeu_ps(targetAddr, mask, _mm256_mul_ps(_mm512_castps512_ps256(ALPHAVECTOR), regResult));

  798. 

  799. 

  800. /* Store 4 (alpha * result) to y

  801. */

  802. #define STORE4_COMPLETE_RESULT_ALPHA(regResult, targetAddr)  \

  803.     _mm_storeu_ps(targetAddr, _mm_mul_ps(_mm512_castps512_ps128(ALPHAVECTOR), regResult));

  804. 

  805. 

  806. /* Masked store 4 (alpha * result) to y

  807. */

  808. #define STORE4_MASK_COMPLETE_RESULT_ALPHA(regResult, targetAddr, mask)  \

  809.     _mm_mask_storeu_ps(targetAddr, mask, _mm_mul_ps(_mm512_castps512_ps128(ALPHAVECTOR), regResult));

  810. 

  811. 

  812. /* Store 16 result to y

  813. */

  814. #define STORE16_COMPLETE_RESULT_DIRECT(regResult, targetAddr)  \

  815.     _mm512_storeu_ps(targetAddr, regResult);

  816. 

  817. 

  818. /* Masked store 16 result to y

  819. */

  820. #define STORE16_MASK_COMPLETE_RESULT_DIRECT(regResult, targetAddr, mask)  \

  821.     _mm512_mask_storeu_ps(targetAddr, mask, regResult);

  822. 

  823. 

  824. /* Store 8 result to y

  825. */

  826. #define STORE8_COMPLETE_RESULT_DIRECT(regResult, targetAddr)  \

  827.     _mm256_storeu_ps(targetAddr, regResult);

  828. 

  829. 

  830. /* Masked store 8 result to y

  831. */

  832. #define STORE8_MASK_COMPLETE_RESULT_DIRECT(regResult, targetAddr, mask)  \

  833.     _mm256_mask_storeu_ps(targetAddr, mask, regResult);

  834. 

  835. 

  836. /* Store 4 result to y

  837. */

  838. #define STORE4_COMPLETE_RESULT_DIRECT(regResult, targetAddr)  \

  839.     _mm_storeu_ps(targetAddr, regResult);

  840. 

  841. 

  842. /* Masked store 4 result to y

  843. */

  844. #define STORE4_MASK_COMPLETE_RESULT_DIRECT(regResult, targetAddr, mask)  \

  845.     _mm_mask_storeu_ps(targetAddr, mask, regResult);

  846. 

  847. #endif