OpenBLAS

Commit Graph

Author	SHA1	Message	Date
James Cowgill	de7875ca5d	mips: remove incorrect blas_lock implementations MIPS 32-bit currently has an empty blas_lock implementation which is worse than nothing at all. MIPS 64-bit does has a blas_lock implementation but is broken. Remove them and fallback to the generic version in common.h which should do the right thing on MIPS.	8 years ago
James Cowgill	67836c2ab4	mips: implement MB and WMB The MIPS architecture has weak memory ordering and therefore requires sutible memory barriers when doing lock free programming with multiple threads (just like ARM does). This commit implements those barriers for MIPS and MIPS64 using GCC bultins which is probably easiest way.	8 years ago
Shivraj Patil	2c3dfe2bf3	MIPS P5600(32 bit) and I6400(64 bit) cores support added. Seperated mips and mips64 files. Configurations support for mips 32 bit. Signed-off-by: Shivraj Patil <shivraj.patil@imgtec.com>	9 years ago
Grazvydas Ignotas	6b92204a7c	add fallback blas_lock implementation to be used on armv5 and new platforms	10 years ago
Grazvydas Ignotas	e12cf1123e	add fallback rpcc implementation - use on arm, arm64 and any new platform - use faster integer math instead of double - use similar scale as rdtsc so that timeouts work	10 years ago
Zhang Xianyi	2fb02626da	Update organization info.	11 years ago
Timothy Gu	6c2ead30f0	Remove all trailing whitespace except lapack-netlib Signed-off-by: Timothy Gu <timothygu99@gmail.com>	11 years ago
Zhang Xianyi	16eb780e13	Refs #262 . Fixed compatibility issues of GNU stack markings with PathScale EKOPath(tm) Compiler Suite: Version 4.0.12.1	12 years ago
Zhang Xianyi	a2930664f4	Refs #262 . Added executable stack markings.	12 years ago
Xianyi Zhang	6958c1a1aa	Fixed the SEGFAULT bug with Loongcc and Loongson3.	12 years ago
Wang Qian	c2dad58ad1	Adding n32 multiple threads condition.	14 years ago
Xianyi Zhang	285e69e2d1	Disable using simple thread level3 to fix a bug on Loongson 3B.	14 years ago
Xianyi Zhang	d1baf14a64	Enable thread affinity on Loongson 3B. Fixed the bug of reading cycle counter. In Loongson 3A and 3B, the CPU core increases the counter in every 2 cycles by default.	14 years ago
Xianyi Zhang	b95ad4cfaf	Support detecting ICT Loongson-3B CPU.	14 years ago
traz	7fa3d23dd9	Complete cgemm function, but no optimization.	14 years ago
traz	cb0214787b	Modify compile options.	14 years ago
Xianyi Zhang	921e040b15	Changed default page size to 16KB on Loongson 3A.	14 years ago
Xianyi Zhang	c0b5992fab	added axpy kernel with prefetch for Loongson3A. To-Do: tuning prefetch distance & instruction order.	14 years ago
Xianyi Zhang	376677452f	Modified the unsupported instruction on Loongson3A. Closed #1 OpenBLAS could run on Loongson3A now.	14 years ago
Xianyi Zhang	342bbc3871	Import GotoBLAS2 1.13 BSD version codes.	14 years ago

20 Commits (revert-1239-cgroups)