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OpenBLAS
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Releases 66 Wiki evaluate Activity
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9527 Commits
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9527 Commits (develop)
 

Author SHA1 Message Date
  Xianyi Zhang 989c6f8b06 Fixed #14 the SEGFAULT bug on 64 cores. On SMP server, the number of CPUs or cores should be less than or equal to 64. 14 years ago
  Xianyi Zhang 552f31dbbd Fixed #13. Fixed blasint undefined bug in <cblas.h> file. 14 years ago
  Xianyi Zhang 5452ba3850 Updated the developing version to v0.1 alpha2. 14 years ago
  Xianyi Zhang 54745902b8 Init Changelog file for next release version(v0.1alpha2). 14 years ago
  traz 1aa9a298e1 Change BLOCK SIZE of LOONGSON3A TARGET. 14 years ago
  traz 782205a693 Add dgemm compiler Options in KERNEL.LOONGSON3A. 14 years ago
  traz ac494c0d04 New kernel in LOONGSON3A. 14 years ago
  Xianyi Zhang 85f99d4769 Fixed #14 the SEGFAULT bug on 64 cores. On SMP server, the number of CPUs or cores should be less than or equal to 64. 14 years ago
  Xianyi Zhang 5e7f29b19e Fixed #13. Fixed blasint undefined bug in <cblas.h> file. 14 years ago
  Xianyi Zhang 141091f528 Merge branch 'master' of github.com:xianyi/OpenBLAS into x86 14 years ago
  Xianyi Zhang e4bb6f2482 Fixed the detecting bug on Intel Core i5. Thank ggl329 for the patch. 14 years ago
  Xianyi Zhang 0edcdd470e Updated the developing version to v0.1 alpha2. 14 years ago
  Xianyi Zhang d672491122 Init Changelog file for next release version(v0.1alpha2). 14 years ago
  Xianyi Zhang 972062903c OpenBLAS 0.1 alpha version 1. 14 years ago
  Xianyi Zhang d9aa359e69 Merge remote branch 'origin/loongson3a' into x86 14 years ago
  Xianyi Zhang 04769bdf54 Merge remote branch 'origin/loongson3a' into x86 14 years ago
  Xianyi Zhang 6f058487ab Detect Intel Core Clarkdale & Arrandale 14 years ago
  Xianyi Zhang f405b5bcc5 Fixed the bug about Loongson3A gsLQC1 & gsSQC1 instructions in daxpy kernel. Now daxpy is correct. 14 years ago
  Xianyi Zhang 2b8643e0de Merge branch 'loongson3a' of github.com:xianyi/OpenBLAS into loongson3a 14 years ago
  Xianyi Zhang c84f8be453 Supported detecting new kernel(2.6.36) & new Loongson3A03 CPU. 14 years ago
  Wang Qian d5cffd506a Modified the default kernel makefile in MIPS64 arch. 14 years ago
  Xianyi Zhang 5838f12995 Support unalign address in daxpy on loongson3a simd.. 14 years ago
  Xianyi Zhang 5444a3f8f7 Unroll to 16 in daxpy on loongson3a. 14 years ago
  Xianyi Zhang 88cbfcc5b5 Merge commit 'origin/x86' into loongson3a 14 years ago
  Xianyi Zhang ce78abe37e Merge branch 'x86' of github.com:xianyi/OpenBLAS into x86 14 years ago
  Xianyi Zhang 8f1090d32a Support NO_LAPACK=1 to build the lib without LAPACK functions. 14 years ago
  Xianyi 272f62a2b6 Changed movlps macro name in capital in x86/zdot_sse2.S file. 14 years ago
  Xianyi 36016fe349 On x86 32bits, gcc 4.4.3 generated wrong codes (movsd) from movlps in zdot_sse2.S line 191. 14 years ago
  Xianyi Zhang 44acb7503e Added zdotu with x & y offset=1 test case. 14 years ago
  Xianyi Zhang 6eb02bbb9c Merge remote branch 'origin/x86' into loongson3a 14 years ago
  Xianyi Zhang 0e782b9bd3 updated the changelog. 14 years ago
  Xianyi Zhang 588737210d Fixed randomly SEGFAULT when nodemask==NULL with above Linux 2.6.34. Fixed #12. Thank Mr.Ei-ji Nakama providing this patch. 14 years ago
  Xianyi Zhang cdf33edac3 Added Changelog. Fixed #11. 14 years ago
  Xianyi Zhang f7a5e049e2 Enable Debug flags in memory alloc and init functions. 14 years ago
  Xianyi Zhang 1b97ec1a7c Added DEBUG option in Makefile.rule. Fixed DEBUG typo mistakes. 14 years ago
  Xianyi Zhang 36b3a730d3 Merge branch 'x86' of github.com:xianyi/OpenBLAS into x86 14 years ago
  Xianyi Zhang 128418f49b Fixed #10. Supported GOTO_NUM_THREADS & GOTO_THREADS_TIMEOUT environment variables. 14 years ago
  Xianyi 12214e1d0f Fixed #7. Modified axpy kernel codes to avoid unloop with incx==0 or incy==0 in x86 32bits arch. 14 years ago
  Xianyi Zhang cd2cbabecc Added unit test case (zdotu, N=1). 14 years ago
  Xianyi Zhang 854137e0fd Supported building debug version. 14 years ago
  Xianyi Zhang afbe3c9791 Improved the quality of codes in unit test. 14 years ago
  Xianyi Zhang 0cfd29a819 Fixed #7. 1)Disable the multi-thread and 2) Modified kernel codes to avoid unloop in axpy function when incx==0 or incy==0. 14 years ago
  Xianyi Zhang 109b86d00e Added axpy unit test with incx==0 and incy==0. 14 years ago
  Xianyi Zhang 78da0e0a0c Fixed #6. Disable multi-thread swap when incx==0 or incy==0. 14 years ago
  Xianyi Zhang 8dd3fd7f26 Added swap unit test with incx==0 and incy==0. 14 years ago
  Xianyi Zhang 51454082c6 Updated readme file. 14 years ago
  Xianyi Zhang e51364edb4 Fixed #5 Detected Intel Westmere (using Nehalem codes) in build and dynamic arch build. 14 years ago
  Xianyi bfaa80c316 fixed #4 csrot & drot returned the wrong result when incx==incy==0 on i686 arch. 14 years ago
  Xianyi bd7a74234f Disable quad and x precision objs in reference. 14 years ago
  Xianyi Zhang 029d5d16d0 Merge branch 'master' into loongson3a 14 years ago