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Merge pull request #2565 from martin-frbg/mips24k

Support MIPS32 24K family as P5600
tags/v0.3.10^2
Martin Kroeker GitHub 5 years ago
parent
commit
fa42588e1f
No known key found for this signature in database GPG Key ID: 4AEE18F83AFDEB23
10 changed files with 68 additions and 8 deletions
  1. +5
    -1
      Makefile.prebuild
  2. +6
    -1
      Makefile.system
  3. +5
    -0
      README.md
  4. +2
    -1
      TargetList.txt
  5. +2
    -0
      common_mips.h
  6. +18
    -4
      cpuid_mips.c
  7. +28
    -0
      getarch.c
  8. +0
    -0
      kernel/mips/KERNEL.MIPS1004K
  9. +1
    -0
      kernel/mips/KERNEL.MIPS24K
  10. +1
    -1
      param.h

+ 5
- 1
Makefile.prebuild View File

@@ -17,7 +17,11 @@ ifdef CPUIDEMU
EXFLAGS = -DCPUIDEMU -DVENDOR=99
endif

ifeq ($(TARGET), 1004K)
ifeq ($(TARGET), MIPS24K)
TARGET_FLAGS = -mips32r2
endif

ifeq ($(TARGET), MIPS1004K)
TARGET_FLAGS = -mips32r2
endif



+ 6
- 1
Makefile.system View File

@@ -690,7 +690,12 @@ CCOMMON_OPT += -march=mips64
FCOMMON_OPT += -march=mips64
endif

ifeq ($(CORE), 1004K)
ifeq ($(CORE), MIPS24K)
CCOMMON_OPT += -mips32r2 -mtune=24kc $(MSA_FLAGS)
FCOMMON_OPT += -mips32r2 -mtune=24kc $(MSA_FLAGS)
endif

ifeq ($(CORE), MIPS1004K)
CCOMMON_OPT += -mips32r2 $(MSA_FLAGS)
FCOMMON_OPT += -mips32r2 $(MSA_FLAGS)
endif


+ 5
- 0
README.md View File

@@ -122,6 +122,11 @@ Please read `GotoBLAS_01Readme.txt` for older CPU models already supported by th
- **AMD STEAMROLLER**: Uses Bulldozer codes with some optimizations.
- **AMD ZEN**: Uses Haswell codes with some optimizations.

#### MIPS32

- **MIPS 1004K**: uses P5600 codes
- **MIPS 24K**: uses P5600 codes

#### MIPS64

- **ICT Loongson 3A**: Optimized Level-3 BLAS and the part of Level-1,2.


+ 2
- 1
TargetList.txt View File

@@ -58,7 +58,8 @@ CELL

3.MIPS CPU:
P5600
1004K
MIPS1004K
MIPS24K

4.MIPS64 CPU:
SICORTEX


+ 2
- 0
common_mips.h View File

@@ -43,6 +43,7 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

#ifndef ASSEMBLER

#if !defined(MIPS24K)
static inline unsigned int rpcc(void){
unsigned long ret;

@@ -53,6 +54,7 @@ static inline unsigned int rpcc(void){
return ret;
}
#define RPCC_DEFINED
#endif

static inline int blas_quickdivide(blasint x, blasint y){
return x / y;


+ 18
- 4
cpuid_mips.c View File

@@ -73,11 +73,13 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#define CPU_UNKNOWN 0
#define CPU_P5600 1
#define CPU_1004K 2
#define CPU_24K 3

static char *cpuname[] = {
"UNKNOWN",
"P5600",
"1004K"
"MIPS1004K",
"MIPS24K"
};

int detect(void){
@@ -105,6 +107,8 @@ int detect(void){
return CPU_P5600;
} else if (strstr(p, "1004K")) {
return CPU_1004K;
} else if (strstr(p, " 24K")) {
return CPU_24K;
} else
return CPU_UNKNOWN;
}
@@ -121,7 +125,7 @@ void get_architecture(void){
}

void get_subarchitecture(void){
if(detect()==CPU_P5600|| detect()==CPU_1004K){
if(detect()==CPU_P5600|| detect()==CPU_1004K|| detect()==CPU_24K){
printf("P5600");
}else{
printf("UNKNOWN");
@@ -146,7 +150,15 @@ void get_cpuconfig(void){
printf("#define MIPS1004K\n");
printf("#define L1_DATA_SIZE 32768\n");
printf("#define L1_DATA_LINESIZE 32\n");
printf("#define L2_SIZE 26144\n");
printf("#define L2_SIZE 262144\n");
printf("#define DTB_DEFAULT_ENTRIES 8\n");
printf("#define DTB_SIZE 4096\n");
printf("#define L2_ASSOCIATIVE 4\n");
} else if (detect()==CPU_24K) {
printf("#define MIPS24K\n");
printf("#define L1_DATA_SIZE 32768\n");
printf("#define L1_DATA_LINESIZE 32\n");
printf("#define L2_SIZE 32768\n");
printf("#define DTB_DEFAULT_ENTRIES 8\n");
printf("#define DTB_SIZE 4096\n");
printf("#define L2_ASSOCIATIVE 4\n");
@@ -159,7 +171,9 @@ void get_libname(void){
if(detect()==CPU_P5600) {
printf("p5600\n");
} else if (detect()==CPU_1004K) {
printf("1004K\n");
printf("mips1004K\n");
} else if (detect()==CPU_24K) {
printf("mips24K\n");
}else{
printf("mips\n");
}


+ 28
- 0
getarch.c View File

@@ -812,6 +812,34 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#else
#endif

#ifdef FORCE_MIPS1004K
#define FORCE
#define ARCHITECTURE "MIPS"
#define SUBARCHITECTURE "MIPS1004K"
#define SUBDIRNAME "mips"
#define ARCHCONFIG "-DMIPS1004K " \
"-DL1_DATA_SIZE=32768 -DL1_DATA_LINESIZE=32 " \
"-DL2_SIZE=262144 -DL2_LINESIZE=32 " \
"-DDTB_DEFAULT_ENTRIES=64 -DDTB_SIZE=4096 -DL2_ASSOCIATIVE=8 "
#define LIBNAME "mips1004K"
#define CORENAME "MIPS1004K"
#else
#endif

#ifdef FORCE_MIPS24K
#define FORCE
#define ARCHITECTURE "MIPS"
#define SUBARCHITECTURE "MIPS24K"
#define SUBDIRNAME "mips"
#define ARCHCONFIG "-DMIPS24K " \
"-DL1_DATA_SIZE=32768 -DL1_DATA_LINESIZE=32 " \
"-DL2_SIZE=32768 -DL2_LINESIZE=32 " \
"-DDTB_DEFAULT_ENTRIES=64 -DDTB_SIZE=4096 -DL2_ASSOCIATIVE=8 "
#define LIBNAME "mips24K"
#define CORENAME "MIPS24K"
#else
#endif

#ifdef FORCE_I6500
#define FORCE
#define ARCHITECTURE "MIPS"


kernel/mips/KERNEL.1004K → kernel/mips/KERNEL.MIPS1004K View File


+ 1
- 0
kernel/mips/KERNEL.MIPS24K View File

@@ -0,0 +1 @@
include $(KERNELDIR)/KERNEL.P5600

+ 1
- 1
param.h View File

@@ -2474,7 +2474,7 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#define SYMV_P 16
#endif

#if defined(P5600) || defined(MIPS1004K) || defined(I6400) || defined(P6600) || defined(I6500)
#if defined(P5600) || defined(MIPS1004K) || defined(MIPS24K) || defined(I6400) || defined(P6600) || defined(I6500)
#define SNUMOPT 2
#define DNUMOPT 2



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