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remove unused INLINE macro definitions

tags/v0.3.29
TGY GYT 2 years ago
parent
commit
815cb24944
9 changed files with 1 additions and 20 deletions
  1. +0
    -2
      common_arm.h
  2. +0
    -2
      common_arm64.h
  3. +0
    -2
      common_e2k.h
  4. +0
    -2
      common_loongarch64.h
  5. +0
    -2
      common_mips.h
  6. +0
    -2
      common_mips64.h
  7. +1
    -3
      common_power.h
  8. +0
    -2
      common_riscv64.h
  9. +0
    -3
      common_zarch.h

+ 0
- 2
common_arm.h View File

@@ -47,8 +47,6 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.


#endif #endif


#define INLINE inline

#define RETURN_BY_COMPLEX #define RETURN_BY_COMPLEX


#ifndef ASSEMBLER #ifndef ASSEMBLER


+ 0
- 2
common_arm64.h View File

@@ -44,8 +44,6 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#define RMB __asm__ __volatile__ ("dmb ishld" : : : "memory") #define RMB __asm__ __volatile__ ("dmb ishld" : : : "memory")
#endif #endif


#define INLINE inline

#if defined( F_INTERFACE_FLANG) || defined(F_INTERFACE_PGI) #if defined( F_INTERFACE_FLANG) || defined(F_INTERFACE_PGI)
#define RETURN_BY_STACK #define RETURN_BY_STACK
#else #else


+ 0
- 2
common_e2k.h View File

@@ -41,8 +41,6 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#define WMB do { __asm__ __volatile__("": : :"memory"); } while (0) #define WMB do { __asm__ __volatile__("": : :"memory"); } while (0)
#define RMB #define RMB


#define INLINE __attribute__((__always_inline__)) inline

static inline int blas_quickdivide(blasint x, blasint y) { static inline int blas_quickdivide(blasint x, blasint y) {
return x / y; return x / y;
} }


+ 0
- 2
common_loongarch64.h View File

@@ -75,8 +75,6 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#define WMB __sync_synchronize() #define WMB __sync_synchronize()
#define RMB __sync_synchronize() #define RMB __sync_synchronize()


#define INLINE inline

#ifndef ASSEMBLER #ifndef ASSEMBLER


static inline int blas_quickdivide(blasint x, blasint y){ static inline int blas_quickdivide(blasint x, blasint y){


+ 0
- 2
common_mips.h View File

@@ -37,8 +37,6 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#define WMB __sync_synchronize() #define WMB __sync_synchronize()
#define RMB __sync_synchronize() #define RMB __sync_synchronize()


#define INLINE inline

#define RETURN_BY_COMPLEX #define RETURN_BY_COMPLEX


#ifndef ASSEMBLER #ifndef ASSEMBLER


+ 0
- 2
common_mips64.h View File

@@ -75,8 +75,6 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#define WMB __sync_synchronize() #define WMB __sync_synchronize()
#define RMB __sync_synchronize() #define RMB __sync_synchronize()


#define INLINE inline

#ifndef ASSEMBLER #ifndef ASSEMBLER


static inline unsigned int rpcc(void){ static inline unsigned int rpcc(void){


+ 1
- 3
common_power.h View File

@@ -78,8 +78,6 @@
#define RMB __asm__ __volatile__ ("sync") #define RMB __asm__ __volatile__ ("sync")
#endif #endif


#define INLINE inline

#ifdef PPC440 #ifdef PPC440
#define STDERR stdout #define STDERR stdout
#define QNONCACHE 0x1 #define QNONCACHE 0x1
@@ -91,7 +89,7 @@


void *qalloc(int flags, size_t bytes); void *qalloc(int flags, size_t bytes);


static INLINE void blas_lock(volatile unsigned long *address){
static inline void blas_lock(volatile unsigned long *address){


long int ret, val = 1; long int ret, val = 1;




+ 0
- 2
common_riscv64.h View File

@@ -75,8 +75,6 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#define WMB __sync_synchronize() #define WMB __sync_synchronize()
#define RMB __sync_synchronize() #define RMB __sync_synchronize()


#define INLINE inline

#ifndef ASSEMBLER #ifndef ASSEMBLER






+ 0
- 3
common_zarch.h View File

@@ -37,9 +37,6 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#define WMB #define WMB
#define RMB #define RMB



#define INLINE inline

#define RETURN_BY_COMPLEX #define RETURN_BY_COMPLEX


#ifndef ASSEMBLER #ifndef ASSEMBLER


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