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Detect Intel Core Clarkdale & Arrandale

tags/v0.1alpha1
Xianyi Zhang 14 years ago
parent
commit
6f058487ab
2 changed files with 11 additions and 6 deletions
  1. +6
    -6
      Changelog.txt
  2. +5
    -0
      cpuid_x86.c

+ 6
- 6
Changelog.txt View File

@@ -1,7 +1,7 @@
OpenBLAS ChangeLog OpenBLAS ChangeLog
==================================================================== ====================================================================
Version 0.1 (in development) Version 0.1 (in development)
26-Feb-2011
20-Mar-2011


common: common:
* Support "make NO_LAPACK=1" to build the library without * Support "make NO_LAPACK=1" to build the library without
@@ -14,17 +14,17 @@ common:
* Supported OPENBLAS_* & GOTO_* environment variables (Pleas see README) * Supported OPENBLAS_* & GOTO_* environment variables (Pleas see README)
* Imported GotoBLAS2 1.13 BSD version * Imported GotoBLAS2 1.13 BSD version


x86/x86 64:
* On x86 32bits, gcc 4.4.3 generated wrong codes (movsd) from movlps
in zdot_sse2.S line 191. This would casue zdotu & zdotc failures.
Instead,Walk around it. (Refs issue #8 #9 on github)
x86/x86_64:
* On x86 32bits, fixed a bug in zdot_sse2.S line 191. This would casue
zdotu & zdotc failures.Instead,Walk around it. (Refs issue #8 #9 on github)
* Modified ?axpy functions to return same netlib BLAS results * Modified ?axpy functions to return same netlib BLAS results
when incx==0 or incy==0 (Refs issue #7 on github) when incx==0 or incy==0 (Refs issue #7 on github)
* Modified ?swap functions to return same netlib BLAS results * Modified ?swap functions to return same netlib BLAS results
when incx==0 or incy==0 (Refs issue #6 on github) when incx==0 or incy==0 (Refs issue #6 on github)
* Modified ?rot functions to return same netlib BLAS results * Modified ?rot functions to return same netlib BLAS results
when incx==0 or incy==0 (Refs issue #4 on github) when incx==0 or incy==0 (Refs issue #4 on github)
* Detect Intel Westmere to use Nehalem codes.
* Detect Intel Westmere,Intel Clarkdale and Intel Arrandale
to use Nehalem codes.
* Fixed a typo bug about compiling dynamic ARCH library. * Fixed a typo bug about compiling dynamic ARCH library.
MIPS64: MIPS64:
* Improve daxpy performance on ICT Loongson 3A. * Improve daxpy performance on ICT Loongson 3A.


+ 5
- 0
cpuid_x86.c View File

@@ -976,6 +976,11 @@ int get_cpuname(void){
break; break;
case 2: case 2:
switch (model) { switch (model) {
case 5:
//Intel Core (Clarkdale) / Core (Arrandale)
// Pentium (Clarkdale) / Pentium Mobile (Arrandale)
// Xeon (Clarkdale), 32nm
return CPUTYPE_NEHALEM;
case 12: case 12:
//Xeon Processor 5600 (Westmere-EP) //Xeon Processor 5600 (Westmere-EP)
return CPUTYPE_NEHALEM; return CPUTYPE_NEHALEM;


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