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common_arm64.h 5.6 kB

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  1. /*****************************************************************************
  2. Copyright (c) 2011-2015, The OpenBLAS Project
  3. All rights reserved.
  4. Redistribution and use in source and binary forms, with or without
  5. modification, are permitted provided that the following conditions are
  6. met:
  7. 1. Redistributions of source code must retain the above copyright
  8. notice, this list of conditions and the following disclaimer.
  9. 2. Redistributions in binary form must reproduce the above copyright
  10. notice, this list of conditions and the following disclaimer in
  11. the documentation and/or other materials provided with the
  12. distribution.
  13. 3. Neither the name of the OpenBLAS project nor the names of
  14. its contributors may be used to endorse or promote products
  15. derived from this software without specific prior written
  16. permission.
  17. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  18. AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  19. IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  20. ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  21. LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  22. DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  23. SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  24. CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  25. OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  26. USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27. **********************************************************************************/
  28. #ifndef COMMON_ARM64
  29. #define COMMON_ARM64
  30. #ifdef C_MSVC
  31. #include <intrin.h>
  32. #define MB __dmb(_ARM64_BARRIER_ISH)
  33. #define WMB __dmb(_ARM64_BARRIER_ISHST)
  34. #define RMB __dmb(_ARM64_BARRIER_ISHLD)
  35. #else
  36. #define MB __asm__ __volatile__ ("dmb ish" : : : "memory")
  37. #define WMB __asm__ __volatile__ ("dmb ishst" : : : "memory")
  38. #define RMB __asm__ __volatile__ ("dmb ishld" : : : "memory")
  39. #endif
  40. #define INLINE inline
  41. #if defined( F_INTERFACE_FLANG) || defined(F_INTERFACE_PGI)
  42. #define RETURN_BY_STACK
  43. #else
  44. #define RETURN_BY_COMPLEX
  45. #endif
  46. #ifndef ASSEMBLER
  47. #ifndef NO_AFFINITY
  48. static __inline int WhereAmI(void){
  49. uint64_t ret;
  50. __asm__ volatile (
  51. " mrs x0, mpidr_el1 \n"
  52. " and x0, x0, 0xff \n"
  53. :"=r" (ret)
  54. :: "memory"
  55. );
  56. ret +=1;
  57. if ((int)ret <0) ret = 0;
  58. return (int)ret;
  59. }
  60. #endif
  61. static __inline void blas_lock(volatile BLASULONG *address){
  62. BLASULONG ret;
  63. do {
  64. #ifndef C_MSVC
  65. __asm__ __volatile__(
  66. "mov x4, #1 \n\t"
  67. "sevl \n\t"
  68. "1: \n\t"
  69. "wfe \n\t"
  70. "2: \n\t"
  71. "ldaxr x2, [%1] \n\t"
  72. "cbnz x2, 1b \n\t"
  73. "stxr w3, x4, [%1] \n\t"
  74. "cbnz w3, 2b \n\t"
  75. "mov %0, #0 \n\t"
  76. : "=r"(ret), "=r"(address)
  77. : "1"(address)
  78. : "memory", "x2" , "x3", "x4"
  79. );
  80. #else
  81. while (*address) {YIELDING;}
  82. ret=InterlockedExchange64((volatile LONG64 *)(address), 1);
  83. #endif
  84. } while (ret);
  85. }
  86. #define BLAS_LOCK_DEFINED
  87. #if !defined(OS_DARWIN) && !defined (OS_ANDROID)
  88. static __inline BLASULONG rpcc(void){
  89. #ifdef C_MSVC
  90. const int64_t pmccntr_el0 = (((3 & 1) << 14) | // op0
  91. ((3 & 7) << 11) | // op1
  92. ((9 & 15) << 7) | // crn
  93. ((13 & 15) << 3) | // crm
  94. ((0 & 7) << 0)); // op2
  95. return _ReadStatusReg(pmccntr_el0);
  96. #else
  97. BLASULONG ret = 0;
  98. blasint shift;
  99. __asm__ __volatile__ ("isb; mrs %0,cntvct_el0":"=r"(ret));
  100. __asm__ __volatile__ ("mrs %0,cntfrq_el0; clz %w0, %w0":"=&r"(shift));
  101. return ret << shift;
  102. #endif
  103. }
  104. #define RPCC_DEFINED
  105. #define RPCC64BIT
  106. #endif
  107. static inline int blas_quickdivide(blasint x, blasint y){
  108. return x / y;
  109. }
  110. #if defined(DOUBLE)
  111. #define GET_IMAGE(res) __asm__ __volatile__("str d1, %0" : "=m"(res) : : "memory")
  112. #else
  113. #define GET_IMAGE(res) __asm__ __volatile__("str s1, %0" : "=m"(res) : : "memory")
  114. #endif
  115. #define GET_IMAGE_CANCEL
  116. #endif
  117. #ifndef F_INTERFACE
  118. #define REALNAME ASMNAME
  119. #else
  120. #define REALNAME ASMFNAME
  121. #endif
  122. #if defined(ASSEMBLER) && !defined(NEEDPARAM)
  123. .macro PROLOGUE
  124. .text ;
  125. .p2align 2 ;
  126. .global REALNAME ;
  127. #if !defined(__APPLE__) && !defined(_WIN32)
  128. .type REALNAME, %function ;
  129. #endif
  130. REALNAME:
  131. .endm
  132. #define EPILOGUE
  133. #define PROFCODE
  134. #endif
  135. #define SEEK_ADDRESS
  136. #ifndef PAGESIZE
  137. #define PAGESIZE ( 4 << 10)
  138. #endif
  139. #define HUGE_PAGESIZE ( 4 << 20)
  140. #ifndef BUFFERSIZE
  141. #if defined(NEOVERSEN1) || defined(NEOVERSEN2) || defined(NEOVERSEV1) || defined(A64FX) || defined(ARMV8SVE)
  142. #define BUFFER_SIZE (32 << 22)
  143. #else
  144. #define BUFFER_SIZE (32 << 20)
  145. #endif
  146. #else
  147. #define BUFFER_SIZE (32 << BUFFERSIZE)
  148. #endif
  149. #define BASE_ADDRESS (START_ADDRESS - BUFFER_SIZE * MAX_CPU_NUMBER)
  150. #ifndef MAP_ANONYMOUS
  151. #define MAP_ANONYMOUS MAP_ANON
  152. #endif
  153. #endif