 Simplifying ARMv8 build parameters
ARMv8 builds were a bit mixed up, with ThunderX2 code in ARMv8 mode
(which is not right because TX2 is ARMv8.1) as well as requiring a few
redundancies in the defines, making it harder to maintain and understand
what core has what. A few other minor issues were also fixed.
Tests were made on the following cores: A53, A57, A72, Falkor, ThunderX,
ThunderX2, and XGene.
Tests were: OpenBLAS/test, OpenBLAS/benchmark, BLAS-Tester.
A summary:
* Removed TX2 code from ARMv8 build, to make sure it is compatible with
all ARMv8 cores, not just v8.1. Also, the TX2 code has actually
harmed performance on big cores.
* Commoned up ARMv8 architectures' defines in params.h, to make sure
that all will benefit from ARMv8 settings, in addition to their own.
* Adding a few more cores, using ARMv8's include strategy, to benefit
from compiler optimisations using mtune. Also updated cache
information from the manuals, making sure we set good conservative
values by default. Removed Vulcan, as it's an alias to TX2.
* Auto-detecting most of those cores, but also updating the forced
compilation in getarch.c, to make sure the parameters are the same
whether compiled natively or forced arch.
Benefits:
* ARMv8 build is now guaranteed to work on all ARMv8 cores
* Improved performance for ARMv8 builds on some cores (A72, Falkor,
ThunderX1 and 2: up to 11%) over current develop
* Improved performance for *all* cores comparing to develop branch
before TX2's patch (9% ~ 36%)
* ThunderX1 builds are 14% faster than ARMv8 on TX1, 9% faster than
current develop's branch and 8% faster than deveop before tx2 patches
Issues:
* Regression from current develop branch for A53 (-12%) and A57 (-3%)
with ARMv8 builds, but still faster than before TX2's commit (+15%
and +24% respectively). This can be improved with a simplification of
TX2's code, to be done in future patches. At least the code is
guaranteed to be ARMv8.0 now.
Comments:
* CortexA57 builds are unchanged on A57 hardware from develop's branch,
which makes sense, as it's untouched.
* CortexA72 builds improve over A57 on A72 hardware, even if they're
using the same includes due to new compiler tunning in the makefile.
6 years ago Simplifying ARMv8 build parameters
ARMv8 builds were a bit mixed up, with ThunderX2 code in ARMv8 mode
(which is not right because TX2 is ARMv8.1) as well as requiring a few
redundancies in the defines, making it harder to maintain and understand
what core has what. A few other minor issues were also fixed.
Tests were made on the following cores: A53, A57, A72, Falkor, ThunderX,
ThunderX2, and XGene.
Tests were: OpenBLAS/test, OpenBLAS/benchmark, BLAS-Tester.
A summary:
* Removed TX2 code from ARMv8 build, to make sure it is compatible with
all ARMv8 cores, not just v8.1. Also, the TX2 code has actually
harmed performance on big cores.
* Commoned up ARMv8 architectures' defines in params.h, to make sure
that all will benefit from ARMv8 settings, in addition to their own.
* Adding a few more cores, using ARMv8's include strategy, to benefit
from compiler optimisations using mtune. Also updated cache
information from the manuals, making sure we set good conservative
values by default. Removed Vulcan, as it's an alias to TX2.
* Auto-detecting most of those cores, but also updating the forced
compilation in getarch.c, to make sure the parameters are the same
whether compiled natively or forced arch.
Benefits:
* ARMv8 build is now guaranteed to work on all ARMv8 cores
* Improved performance for ARMv8 builds on some cores (A72, Falkor,
ThunderX1 and 2: up to 11%) over current develop
* Improved performance for *all* cores comparing to develop branch
before TX2's patch (9% ~ 36%)
* ThunderX1 builds are 14% faster than ARMv8 on TX1, 9% faster than
current develop's branch and 8% faster than deveop before tx2 patches
Issues:
* Regression from current develop branch for A53 (-12%) and A57 (-3%)
with ARMv8 builds, but still faster than before TX2's commit (+15%
and +24% respectively). This can be improved with a simplification of
TX2's code, to be done in future patches. At least the code is
guaranteed to be ARMv8.0 now.
Comments:
* CortexA57 builds are unchanged on A57 hardware from develop's branch,
which makes sense, as it's untouched.
* CortexA72 builds improve over A57 on A72 hardware, even if they're
using the same includes due to new compiler tunning in the makefile.
6 years ago Simplifying ARMv8 build parameters
ARMv8 builds were a bit mixed up, with ThunderX2 code in ARMv8 mode
(which is not right because TX2 is ARMv8.1) as well as requiring a few
redundancies in the defines, making it harder to maintain and understand
what core has what. A few other minor issues were also fixed.
Tests were made on the following cores: A53, A57, A72, Falkor, ThunderX,
ThunderX2, and XGene.
Tests were: OpenBLAS/test, OpenBLAS/benchmark, BLAS-Tester.
A summary:
* Removed TX2 code from ARMv8 build, to make sure it is compatible with
all ARMv8 cores, not just v8.1. Also, the TX2 code has actually
harmed performance on big cores.
* Commoned up ARMv8 architectures' defines in params.h, to make sure
that all will benefit from ARMv8 settings, in addition to their own.
* Adding a few more cores, using ARMv8's include strategy, to benefit
from compiler optimisations using mtune. Also updated cache
information from the manuals, making sure we set good conservative
values by default. Removed Vulcan, as it's an alias to TX2.
* Auto-detecting most of those cores, but also updating the forced
compilation in getarch.c, to make sure the parameters are the same
whether compiled natively or forced arch.
Benefits:
* ARMv8 build is now guaranteed to work on all ARMv8 cores
* Improved performance for ARMv8 builds on some cores (A72, Falkor,
ThunderX1 and 2: up to 11%) over current develop
* Improved performance for *all* cores comparing to develop branch
before TX2's patch (9% ~ 36%)
* ThunderX1 builds are 14% faster than ARMv8 on TX1, 9% faster than
current develop's branch and 8% faster than deveop before tx2 patches
Issues:
* Regression from current develop branch for A53 (-12%) and A57 (-3%)
with ARMv8 builds, but still faster than before TX2's commit (+15%
and +24% respectively). This can be improved with a simplification of
TX2's code, to be done in future patches. At least the code is
guaranteed to be ARMv8.0 now.
Comments:
* CortexA57 builds are unchanged on A57 hardware from develop's branch,
which makes sense, as it's untouched.
* CortexA72 builds improve over A57 on A72 hardware, even if they're
using the same includes due to new compiler tunning in the makefile.
6 years ago |
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- Force Target Examples:
-
- make TARGET=NEHALEM
- make TARGET=LOONGSON3A BINARY=64
- make TARGET=ISTANBUL
-
- Supported List:
- 1.X86/X86_64
- a)Intel CPU:
- P2
- KATMAI
- COPPERMINE
- NORTHWOOD
- PRESCOTT
- BANIAS
- YONAH
- CORE2
- PENRYN
- DUNNINGTON
- NEHALEM
- SANDYBRIDGE
- HASWELL
- SKYLAKEX
- ATOM
- COOPERLAKE
- SAPPHIRERAPIDS
-
- b)AMD CPU:
- ATHLON
- OPTERON
- OPTERON_SSE3
- BARCELONA
- SHANGHAI
- ISTANBUL
- BOBCAT
- BULLDOZER
- PILEDRIVER
- STEAMROLLER
- EXCAVATOR
- ZEN
-
- c)VIA CPU:
- SSE_GENERIC
- VIAC3
- NANO
-
- 2.Power CPU:
- POWER4
- POWER5
- POWER6
- POWER7
- POWER8
- POWER9
- POWER10
- POWER11
- PPCG4
- PPC970
- PPC970MP
- PPC440
- PPC440FP2
- CELL
-
- 3.MIPS CPU:
- P5600
- MIPS1004K
- MIPS24K
-
- 4.MIPS64 CPU:
- MIPS64_GENERIC
- SICORTEX
- LOONGSON3A
- LOONGSON3B
- I6400
- P6600
- I6500
-
- 5.IA64 CPU:
- ITANIUM2
-
- 6.SPARC CPU:
- SPARC
- SPARCV7
-
- 7.ARM CPU:
- CORTEXA15
- CORTEXA9
- ARMV7
- ARMV6
- ARMV5
-
- 8.ARM 64-bit CPU:
- ARMV8
- CORTEXA53
- CORTEXA57
- CORTEXA72
- CORTEXA73
- CORTEXA76
- CORTEXA510
- CORTEXA710
- CORTEXX1
- CORTEXX2
- NEOVERSEN1
- NEOVERSEV1
- NEOVERSEN2
- NEOVERSEV2
- CORTEXA55
- EMAG8180
- FALKOR
- THUNDERX
- THUNDERX2T99
- TSV110
- THUNDERX3T110
- VORTEX
- A64FX
- ARMV8SVE
- ARMV9SME
- FT2000
-
- 9.System Z:
- ZARCH_GENERIC
- Z13
- Z14
-
- 10.RISC-V 64:
- RISCV64_GENERIC (e.g. PolarFire Soc/SiFive U54)
- RISCV64_ZVL128B
- C910V
- x280
- RISCV64_ZVL256B
-
- 11.LOONGARCH64:
- // LOONGSONGENERIC/LOONGSON2K1000/LOONGSON3R5 are legacy names,
- // and it is recommended to use the more standardized naming conventions
- // LA64_GENERIC/LA264/LA464. You can still specify TARGET as
- // LOONGSONGENERIC/LOONGSON2K1000/LOONGSON3R5 during compilation or runtime,
- // and they will be internally relocated to LA64_GENERIC/LA264/LA464.
- LOONGSONGENERIC
- LOONGSON2K1000
- LOONGSON3R5
- LA64_GENERIC
- LA264
- LA464
-
- 12. Elbrus E2000:
- E2K
-
- 13. Alpha
- EV4
- EV5
- EV6
-
- 14.CSKY
- CSKY
- CK860FV
|
